Intel L5238 AT80573JJ0676MT Data Sheet

34

1.

The V

CC_MIN

 and V

CC_MAX

 loadlines represent static and transient limits. Please see 

 for VCC 

overshoot specifications.

2.

Refer to 

 for processor VID information.

3.

Refer to 

 for V

CC

Static and Transient Tolerance

4.

The load lines specify voltage limits at the die measured at the VCC_DIE_SENSE and VSS_DIE_SENSE 

lands and the VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands. Voltage regulation feedback for voltage 

regulator circuits must also be taken from processor VCC_DIE_SENSE and VSS_DIE_SENSE lands and 

VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands. Refer to the Voltage Regulator Module (VRM) and 

Enterprise Voltage Regulator Down (EVRD) 11.0 Design Guidelines for socket load line guidelines and VR 

implementation. Please refer to the appropriate platform design guide for details on VR implementation.

1.

Unless otherwise noted, all specifications in this table apply to all processor frequencies.

2.

V

IL

 is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low 

value.

3.

V

IH

 is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high 

value.

4.

V

IH

 and V

OH

 may experience excursions above V

TT

. However, input signal drivers must comply with the 

signal quality specifications.

5.

This is the pull down driver resistance. Refer to processor I/O Buffer Models for I/V characteristics. 

Measured at 0.31*V

TT

. R

ON

 (min) = 0.158*R

TT

. R

ON

 (typ) = 0.167*R

TT

. R

ON

 (max) = 0.175*R

TT

.

6.

GTLREF should be generated from V

TT

 with a 1% tolerance resistor divider. The V

TT

 referred to in these 

specifications is the instantaneous V

TT

.

7.

Specified when on-die R

TT

 and R

ON

 are turned off. V

IN

 between 0 and V

TT

.

1.

Unless otherwise noted, all specifications in this table apply to all processor frequencies.

2.

The V

TT

 referred to in these specifications refers to instantaneous V

TT

.

3.

Refer to the processor I/O Buffer Models for I/V characteristics.

4.

Measured at 0.1*V

TT

.

5.

Measured at 0.9*V

TT

.

6.

For Vin between 0 V and V

TT

. Measured when the driver is tristated.

V

IL

Input Low Voltage

-0.10

0

GTLREF-0.10

V

2,4,6

V

IH

Input High Voltage

GTLREF+0.10

V

TT

V

TT

+0.10

V

3,6

V

OH

Output High Voltage

V

TT

-0.10

N/A

V

TT

V

4,6

R

ON

Buffer On Resistance

8.25

10.25

12.25

Ω

5

I

LI

Input Leakage Current

N/A

N/A

± 100

μA

7

V

IL

Input Low Voltage

-0.10

0.00

0.3 * V

TT

V

2,3

V

IH

Input High Voltage

0.7 * V

TT

V

TT

V

TT

 + 0.1

V

2

V

OL

Output Low Voltage

-0.10

0

0.1 * V

TT

V

2

V

OH

Output High Voltage

0.9 * V

TT

V

TT

V

TT 

+ 0.1

V

2

I

OL

Output Low Current

1.70

N/A

4.70

mA

4

I

OH

Output High Current

1.70

N/A

4.70

mA

5

I

LI

Input Leakage Current

N/A

N/A

± 100

μA

6

V

OL

Output Low Voltage

0

N/A

0.20 * V

TT

V

V

OH

Output High Voltage

0.95 * V

TT

V

TT

1.05 * V

TT

V

3

I

OL

Output Low Current

16

N/A

50

mA

2

I

LO

Leakage Current

N/A

N/A

± 200

μA

4