Intel AT80604004872AA User Manual
Intel® Xeon® Processor 7500 Datasheet, Volume 1
165
Features
7.5.4.14
CVTH: Cache Voltage Tolerance, High
This location contains the maximum Cache Voltage Tolerance DC offset high. This field,
rounded to the next thousandth, is in mV and is reflected in binary coded decimal. A
value of FF indicates that this value is undetermined. Writes to this register have no
effect.
rounded to the next thousandth, is in mV and is reflected in binary coded decimal. A
value of FF indicates that this value is undetermined. Writes to this register have no
effect.
Example: A 50 mV tolerance would be saved as 50h.
7.5.4.15
CVTL: Cache Voltage Tolerance, Low
This location contains the maximum Cache Voltage Tolerance DC offset low. This field,
rounded to the next thousandth, is in mV and is reflected in binary coded decimal. A
value of FF indicates that this value is undetermined. Writes to this register have no
effect.
rounded to the next thousandth, is in mV and is reflected in binary coded decimal. A
value of FF indicates that this value is undetermined. Writes to this register have no
effect.
Example: A 50 mV tolerance would be saved as 50h.
7.5.4.16
RES5: Reserved 5
This location is reserved. Writes to this register have no effect.
Offset:
43h-44h
Bit
Description
15:0
Cache Voltage ID
0000h-FFFFh: mV
Offset:
45h
Bit
Description
7:0
Cache Voltage Tolerance, High
00h-FFh: mV
Offset:
46h
Bit
Description
7:0
Cache Voltage Tolerance, Low
00h-FFh: mV
Offset:
47h-4Ah
Bit
Description
31:0
RESERVED
00000000h-FFFFFFFFh: Reserved