Intel AT80604004872AA User Manual

36

Intel® Xeon® Processor 7500 Datasheet, Volume 1

1.

1300mVpp swing is recommended when CPU to CPU or CPU to IOH length is within 2” of max trace length. 

Note that default value is 1100mVpp.

2.

Measure AC CM noise at the TX and decimate to its spectral components. For all spectral components above 

3.2GHz, apply the attenuation of the channel at the appropriate frequency. If the resultant AC CM at the 

receiver is met after taking out the appropriate spectral components meets the RX AC CM spec then we can 

allow the transmitter AC CM noise to pass.

3.

Measured with victim lane running clock pattern, neighboring aggressor lanes running DC pattern and far 

aggressor lanes running PRBS pattern.

VRx-CLK 

Forward CLK Rx input voltage 

sensitivity (differential pp)

180

mV

V

Rx-cm-dc-pin

DC common mode ranges at the 

Rx input for any data or clock 

channel

125

350

mV

V

Rx-cm-ac-pin

AC common mode ranges at the 

Rx input for any data or clock 

channel, defined as:
((V

D+

 + V

D-

/2 - V

RX-cm-dc-pin

)

-50

50

mV

2

V

Tx-diff-pp-pin

Transmitter differential swing

800

1500

mV

1

Z

TX_LOW_CM_DC

DC resistance of Tx terminations 

at half the single ended swing 

(which is usually 0.25*V

Tx-diff-pp-

pin

) bias point

38

47

Ω

Z

RX_LOW_CM_DC

DC resistance of Rx terminations 

at half the single ended swing 

(which is usually 0.25*V

Tx-diff-pp-

pin

) bias point

38

47

Ω

V

Tx-cm-dc-pin

Transmitter output DC common 

mode, defined as average of V

D+

 

and V

D-

0.23

0.27

Fraction of 

V

Tx-diff-pp-pin

4

V

Tx-cm-ac-pin

Transmitter output AC common 

mode, defined as ((V

D+

 + V

D-

)/2 - 

V

Tx-cm-dc-pin

)

-

0.0375

0.0375

Fraction of 

V

Tx-diff-pp-pin

2

TX

duty-pin

Average of absolute UI-UI jitter

-0.025

0.025

UI

TX

jitUI-UI-1E-7-pin

UI-UI jitter measured at Tx output 

pins with 1E-7 probability.

-0.07

0.07

UI

3

TX

jitUI-UI-1E-9-pin

UI-UI jitter measured at Tx output 

pins with 1E-9 probability.

-0.075

0.075

UI

TX

clk-acc-jit-N_UI-1E-7

p-p accumulated jitter out of 

transmitter over 0 <= n <= N UI 

where N=12, measured with 1E-7 

probability.

0

0.15

UI

TX

clk-acc-jit-N_UI-1E-9

p-p accumulated jitter out of 

transmitter over 0 <= n <= N UI 

where N=12, measured with 1E-9 

probability.

0

0.17

UI

T

Tx-data-clk-skew-pin

Delay of any data lane relative to 

clock lane, as measured at Tx 

output

-0.5

0.5

UI

V

Rx-diff-pp-pin

Voltage eye opening at the end of 

Tx+ channel for any data or clock 

channel measured with a 

cumulative probability of 1E-9 

(UI). 

155

1200

mV

2