Intel 9140N NE80567KE025009 User Manual

Product codes
NE80567KE025009
Page of 120
Intel
®
 Itanium
®
 Processor 9300 Series Datasheet
115
Intel Itanium Processor 9300 Series Signal Definitions
FBD1NBICLK[C/D][P/N]0 I
These 
differential pair clock signals generated from the branch one, channel C and 
D of FB-DIMMs are input to the Intel® Itanium® processor 9300 series
Example: FBD1NBICLKDP0 represent FB-DIMM branch 1, northbound clock input 
signal of channel D and positive bit of the differential pair. 
FBD0SBOCLK[A/B][P/N]0
O
These differential pair output clock signals generated from the processor are inputs 
to the branch zero, channel A and B of FB-DIMMs.
Example: FBD0SBICLKAP0 represent FB-DIMM branch 0, southbound clock output 
signal of channel A and positive bit of the differential pair. 
FBD1SBOCLK[C/D][P/N]0
O
These differential pair output clock signals generated from the processor are inputs 
to the branch one, channel C and D of FB-DIMMs.
Example: FBD1SBICLKDP0 represents FB-DIMM branch 1, southbound clock output 
signal of channel D and positive bit of the differential pair. 
FBD0NBI[A/B][P/N][12:0]
I
These differential pair data signals generated from the branch zero, channel A and 
B of FB-DIMMs are input to the processor.
Example: FBD0NBIAP[0] represent FB-DIMM branch 0, northbound data input lane 
0 signal of channel A and positive bit of the differential pair. 
FBD0NBI[A/B][P/N][13]
I
These signals are spare lanes, and are intended for Reliability, Availability, and 
Serviceability (RAS) coverage on future Intel Itanium processors. These signals are 
not used by Intel Itanium processor 9300 series processor.
Table 7-1.
Signal Definitions Intel Itanium Processor 9300 Series
 
 (Sheet 3 of 8)
Name
Type
Description
FB-
DIMM
1
NB
I
CLK
C/D
P/N
Interface 
Name
Branch 
Number
North 
Bound
Input
Clock
Channel
Differential 
Pair
Polarity 
Positive/
Negative
FB-
DIMM
0
SB
O
CLK
A/B
P/N
Interface 
Name
Branch 
Number
South 
Bound
Output
Clock
Channel
Differential 
Pair
Polarity 
Positive/
Negative
FB-
DIMM
1
SB
O
CLK
C/D
P/N
Interface 
Name
Branch 
Number
South 
Bound
Output
Clock
Channel
Differential 
Pair
Polarity 
Positive/
Negative
FB-
DIMM
0
NB
I
A/B
P/N
[12:0]
Interface 
Name
Branch 
Number
North 
Bound
Input
Channel
Differential 
Pair
Polarity 
Positive/
Negative
Lane 
Number