Intel Itanium 9350 LW80603002589AA User Manual

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FBD[0/1]REFSYSCLK[P/N]

I

These differential pair input clock signals are inputs to the branch zero and branch 

one of FB-DIMMs. They provide the 133.33 MHz differential reference clock.

Example: FBD1REFSYSCLKP represents FB-DIMM branch 1, reference clk positive 

bit of the differential pair. 

FBD1NBI[C/D][P/N][12:0]

I

These differential pair data signals generated from the branch one, channel C and D 

of FB-DIMMs are input to the Intel® Itanium® processor 9300 series.

Example: FBD1NBICP[0] represents FB-DIMM branch 1, northbound data input lane 

0 signal of channel C and positive bit of the differential pair. 

FBD1NBI[C/D][P/N][13]

I

These signals are spare lanes, and are intended for RAS coverage on future Intel 

Itanium processors. These signals are not used by the processor

FBD0SBO[A/B][P/N][9:0]

O

These differential pair output data signals generated from the processor to the 

branch zero, channel A and B of FB-DIMMs.

Example: FBD0SBOAP[0] represents FB-DIMM branch 1, southbound data output 

lane 0 signal of channel A and positive bit of the differential pair.

FBD0SBO[A/B][P/N][10]

O

These signals are spare lanes, and are intended for RAS coverage on future Intel 

Itanium processors. These signals are not used by Intel Itanium processor 9300 

series.

FBD1SBO[C/D][P/N][9:0]

O

These differential pair output data signals generated from the processor to the 

branch one, channel C and D of FB-DIMMs.

Example: FBD1SBOCP[0] represents FB-DIMM branch 1, southbound data output 

lane 0 signal of channel C and positive bit of the differential pair.

FBD1SBO[C/D][P/N][10]

O

These signals are spare lanes, and are intended for RAS coverage on future Intel 

Itanium processors. These signals are not used by Intel Itanium processor 9300 

series.

 

Interface 

Name

Branch 

Number

Reference 

Clock

Differential Pair
Polarity 

Positive/

Negative

Interface 

Name

Branch 

Number

North 

Bound

Input

Channel

Differential 

Pair
Polarity 

Positive/

Negative

Lane 

Number

Interface 

Name

Branch 

Number

South 

Bound

Output

Channel

Differential 

Pair
Polarity 

Positive/

Negative

Lane 

Number

Interface 

Name

Branch 

Number

North 

Bound

Output

Channel

Differential 

Pair
Polarity 

Positive/

Negative

Lane 

Number