Intel X3470 BV80605001905AJ User Manual

Datasheet, Volume 1

49

This chapter describes the processor signals. They are arranged in functional groups 
according to their associated interface or category. The following notations are used to 
describe the signal type.

The signal description also includes the type of buffer used for the particular signal.

I

Input  Pin

O

Output  Pin

I/O

Bi-directional Input/Output Pin

PCI Express*

PCI Express* interface signals. These signals are compatible with the PCI Express 2.0 

Signaling Environment AC Specifications and are AC Coupled. The buffers are not 

3.3 V tolerant. Refer to the PCI Express Specification.

FDI

Intel Flexible Display Interface signals. These signals are compatible with PCI Express 

2.0 Signaling Environment AC Specifications, but are DC coupled. The buffers are not 

3.3 V tolerant. 

DMI

Direct Media Interface signals. These signals are compatible with PCI Express 2.0 

Signaling Environment AC Specifications, but are DC coupled. The buffers are not 

3.3 V tolerant. 

CMOS

CMOS buffers. 1.1 V tolerant

DDR3

DDR3 buffers: 1.5 V tolerant

GTL

Gunning Transceiver Logic signaling technology

TAP

Test Access Port signal

Analog

Analog reference or output. May be used as a threshold voltage or for buffer 

compensation.

Ref

Voltage reference signal

Asynch

This signal is asynchronous and has no timing relationship with any reference clock.