Intel 2 Duo T8300 EC80577GG0563M User Manual

Product codes

EC80577GG0563M

Datasheet

Low Power Features

NOTES:
1.

AutoHALT or MWAIT/C1.

2.1.1

Core Low-Power State Descriptions

2.1.1.1

Core C0 State

This is the normal operating state for cores in the processor.

2.1.1.2

Core C1/AutoHALT Power-Down State

C1/AutoHALT is a low-power state entered when a core executes the HALT instruction.

The processor core will transition to the C0 state upon occurrence of SMI#, INIT#,

LINT[1:0] (NMI, INTR), or FSB interrupt messages. RESET# will cause the processor to

immediately initialize itself.

A System Management Interrupt (SMI) handler will return execution to either Normal

state or the AutoHALT power-down state. See the Intel® 64 and IA-32 Architectures

Software Developer's Manuals, Volume 3A/3B: System Programmer's Guide for more

information.

The system can generate a STPCLK# while the processor is in the AutoHALT power-

down state. When the system deasserts the STPCLK# interrupt, the processor will

return execution to the HALT state.

Figure 2.

Package Low-Power States

Table 1.

Coordination of Core Low-Power States at the Package Level

Package State

Core 1 State

Core 0 State

C4/C6

Normal

Stop-Grant

Normal

Stop-Grant

Deep Sleep

C4/C6

Normal

Stop-Grant

Deep Sleep

Deeper Sleep/Intel®

Enhanced Deeper Sleep/

Intel® Deep Power-Down

Stop

Grant

Snoop

Normal

Stop

Grant

Deep

Sleep

STPCLK# asserted

Snoop

serviced

Snoop
occurs

Deeper

Sleep

†

Sleep

SLP# asserted

SLP# de-asserted

DPSLP# asserted

DPSLP# de-asserted

DPRSTP# de-asserted

DPRSTP# asserted

STPCLK# de-asserted

† — Deeper Sleep includes the Deeper Sleep state, Intel Enhanced Deeper Sleep state, and C6 state