Intel E7310 LF80565QH0254M Data Sheet

Product codes
LF80565QH0254M
Page of 142
Introduction
12
 Document Number: 318080-002
• Processor Information ROM (PIROM) — A memory device located on the 
processor and accessible via the System Management Bus (SMBus) which contains 
information regarding the processor’s features. This device is shared with the 
Scratch EEPROM, is programmed during manufacturing, and is write-protected. 
• Scratch EEPROM (Electrically Erasable, Programmable Read-Only Memory) 
— A memory device located on the processor and addressable via the SMBus which 
can be used by the OEM to store information useful for system management.
• SMBus — System Management Bus. A two-wire interface through which simple 
system and power management related devices can communicate with the rest of 
the system. It is based on the principals of the operation of the I
2
C* two-wire serial 
bus from Phillips Semiconductor.
Note: I
2
C is a two-wire communications bus/protocol developed by Phillips. 
SMBus is a subset of the I
2
C bus/protocol and was developed by Intel. 
Implementations of the I
2
C bus/protocol or the SMBus bus/protocol may 
require licenses from various entities, including Phillips Electronics N.V. and 
North American Phillips Corporation.
• Priority Agent – The priority agent is the host bridge to the processor and is 
typically known as the chipset.
• Symmetric Agent – A symmetric agent is a processor which shares the same I/O 
subsystem and memory array, and runs the same operating system as another 
processor in a system. Systems using symmetric agents are known as Symmetric 
Multiprocessing (SMP) systems. 
• Integrated Heat Spreader (IHS) – A component of the processor package used 
to enhance the thermal performance of the package. Component thermal solutions 
interface with the processor at the IHS surface.
• Thermal Design Power – Processor thermal solutions should be designed to meet 
this target. It is the highest expected sustainable power while running known 
power intensive real applications. TDP is not the maximum power that the 
processor can dissipate.
• Intel
®
 64 – Instruction set architecture and programming environment of Intel’s 
64-bit processors, which are a superset of and compatible with IA-32. This 64-bit 
instruction set architecture was formerly known as IA-32 with EM64T or Intel
®
 
EM64T.
• Platform Environment Control Interface (PECI) – A proprietary one-wire bus 
interface that provides a communication channel between Intel processor and 
chipset components to external thermal monitoring devices, for use in fan speed 
control. PECI communicates readings from the processor’s Digital Thermal Sensors 
(DTS). The DTS replaces the thermal diode available in previous processors.
• Intel
®
 Virtualization Technology – Processor virtualization which when used in 
conjunction with Virtual Machine Monitor software enables multiple, robust 
independent software environments inside a single platform.
• VRM (Voltage Regulator Module) – DC-DC converter built onto a module that 
interfaces with a card edge socket and supplies the correct voltage and current to 
the processor based on the logic state of the processor VID bits.
• EVRD (Enterprise Voltage Regulator Down) – DC-DC converter integrated 
onto the system board that provides the correct voltage and current to the 
processor based on the logic state of the processor VID bits.
• V
CC 
– The processor core power supply.
• V
SS 
– The processor ground.
• V
TT 
– FSB termination voltage.