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Intel E7310 LF80565QH0254M Data Sheet

Product codes
LF80565QH0254M
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Page of 142
Features
122
Document Number: 318080-002
7.4.3.1.2
PISIZE: PIROM Size
This location identifies the PIROM size. Writes to this register have no effect.
7.4.3.1.3
PDA: Processor Data Address
This location provides the offset to the Processor Data Section. Writes to this register 
have no effect.
7.4.3.1.4
PCDA: Processor Core Data Address
This location provides the offset to the Processor Core Data Section. Writes to this 
register have no effect.
7.4.3.1.5
L3CDA: L3 Cache Data Address
This location provides the offset to the L3 Cache Data Section. Writes to this register 
have no effect.
Offset:
01h-02h
Bit
Description
15:0
PIROM Size
The PIROM size provides the size of the device in hex bytes. The MSB is at 
location 01h, the LSB is at location 02h.
0000h - 007Fh: Reserved
0080h: 128 byte PIROM size
0081- FFFFh: Reserved
Offset:
03h
Bit
Description
7:0
Processor Data Address
Byte pointer to the Processor Data section
00h: Processor Data section not present
01h - 0Dh: Reserved
0Eh: Processor Data section pointer value
0Fh-FFh: Reserved
Offset:
04h
Bit
Description
7:0
Processor Core Data Address
Byte pointer to the Processor Data section
00h: Processor Core Data section not present
01h - 15h: Reserved
16h: Processor Core Data section pointer value
17h-FFh: Reserved
Offset:
05h
Bit
Description
7:0
L3 Cache Data Address
Byte pointer to the L3 Cache Data section
00h: L3 Cache Data section not present
01h - 24h: Reserved
25h: L3 Cache Data section pointer value
26h-FFh: Reserved