Intel LF80550KF100007 Data Sheet
Electrical Specifications
34
Dual-Core Intel® Xeon® Processor 7100 Series Datasheet
Notes:
1.
I
CACHE
refers to the current drawn by a single Dual-Core Intel Xeon processor 7100 series cache. The
V
CACHE_MIN
loadline assumes two Dual-Core Intel Xeon processor 7100 series caches are powered off one
VRM and that the second cache is drawing I
CACHE_MAX
= 40A.
2.
V
VRM_MAX
and V
VRM_MIN
are VRM voltage regulation requirements measured at the power plane reference
point (the VRM remote-sense point is on the system board, not at the socket.)
2.10.2
V
CC
Overshoot Specification
The Dual-Core Intel Xeon processor 7100 series can tolerate short transient overshoot
events where V
events where V
CC
exceeds the VID voltage when transitioning from a high-to-low
current load condition. This overshoot cannot exceed VID + V
OS_MAX
. (V
OS_MAX
is the
maximum allowable overshoot above VID). These specifications apply to the processor
die voltage as measured across the V
die voltage as measured across the V
CCSENSE
and V
SSSENSE
pins.
Table 2-13. V
CACHE
Static and Transient Tolerance at the Board
I
CACHE
[A]
V
CACHE_MAX
[V]
V
CACHE_TYP
[V]
V
CACHE_MIN
[V]
Notes
0
CVID - 0.000
CVID - 0.041
CVID - 0.082
1,2
5
CVID - 0.003
CVID - 0.044
CVID - 0.086
1,2
10
CVID - 0.006
CVID - 0.048
CVID - 0.090
1,2
15
CVID - 0.009
CVID - 0.051
CVID - 0.094
1,2
20
CVID - 0.011
CVID - 0.055
CVID - 0.098
1,2
25
CVID - 0.014
CVID - 0.058
CVID - 0.102
1,2
30
CVID - 0.017
CVID - 0.061
CVID - 0.106
1,2
35
CVID - 0.020
CVID - 0.065
CVID - 0.110
1,2
40
CVID - 0.023
CVID - 0.068
CVID - 0.114
1,2
Figure 2-6. V
CACHE
Static and Transient Tolerance at the Board
CVID - 0.000
CVID - 0.020
CVID - 0.040
CVID - 0.060
CVID - 0.080
CVID - 0.100
CVID - 0.120
0
5
10
15
20
25
30
35
40
Icache [A]
V
c
ach
e [
V
]
V
Cache
Maximum
V
Cache
Typical
V
Cache
Minimum