Intel D425 AU80610006252AA User Manual
Product codes
AU80610006252AA
Processor Configuration Registers
140
Datasheet
1.10.12 SID2 - Subsystem Identification
B/D/F/Type: 0/2/1/PCI
Address Offset:
2E-2Fh
Default Value:
0000h
Access:
RO;
Size: 16
bits
Bit Access
Default
Value
Description
15:0 RO 0000h
Subsystem Identification (SUBID):
This value is used to identify a particular
subsystem. This field should be programmed by
BIOS during boot-up. Once written, this register
becomes Read_Only. This register can only be
cleared by a Reset.
This value is used to identify a particular
subsystem. This field should be programmed by
BIOS during boot-up. Once written, this register
becomes Read_Only. This register can only be
cleared by a Reset.
1.10.13 ROMADR - Video BIOS ROM Base Address
B/D/F/Type: 0/2/1/PCI
Address Offset:
Address Offset:
30-33h
Default Value:
00000000h
Access:
RO;
Size: 32
bits
The IGD does not use a separate BIOS ROM, therefore this register is hardwired to 0s.
Bit Access Default
Value
Description
31:18 RO 0000h
ROM Base Address (RBA):
Hardwired to 0's.
Hardwired to 0's.
17:11 RO
00h
Address Mask (ADMSK):
Hardwired to 0s to indicate 256 KB address
range.
Hardwired to 0s to indicate 256 KB address
range.
10:1 RO 000h
Reserved ():
Hardwired to 0s.
Hardwired to 0s.
0 RO 0b
ROM BIOS Enable (RBE):
0:
ROM not accessible.