Intel 2 Duo T9500 EC80576GG0646M User Manual

Intel

Product codes

EC80576GG0646M

4

Datasheet

Figures

Core Low-Power States .............................................................................................12

Package Low-Power States ........................................................................................13

C6 Entry Sequence ...................................................................................................18

C6 Exit Sequence .....................................................................................................18

Active VCC and ICC Loadline Standard Voltage and Extreme Edition Processors ................33

Deeper Sleep VCC and ICC Loadline Standard Voltage and Extreme Edition Processors ......34

6-MB and 3-MB on 6-MB Die Micro-FCPGA Processor Package Drawing (Sheet 1 of 2) ........38

6-MB and 3-MB on 6-MB Die Micro-FCPGA Processor Package Drawing (Sheet 2 of 2) ........39

6-MB and 3-MB on 6-MB Die Micro-FCBGA Processor Package Drawing (Sheet 1 of 2)........40

10 6-MB and 3-MB on 6-MB die Micro-FCBGA Processor Package Drawing (Sheet 2 of 2) ........41
11 3-MB Micro-FCPGA Processor Package Drawing (Sheet 1 of 2) ........................................42
12 3-MB Micro-FCPGA Processor Package Drawing (Sheet 2 of 2) ........................................43
13 3-MB Micro-FCBGA Processor Package Drawing (Sheet 1 of 2) ........................................44
14 3-MB Micro-FCBGA Processor Package Drawing (Sheet 2 of 2) ........................................45
15 Processor Pinout (Top Package View, Left Side) ............................................................46
16 Processor Pinout (Top Package View, Right Side) ..........................................................47

Tables

Coordination of Core Low-Power States at the Package Level..........................................13

Voltage Identification Definition..................................................................................23

BSEL[2:0] Encoding for BCLK Frequency......................................................................27

FSB Pin Groups ........................................................................................................28

Processor Absolute Maximum Ratings..........................................................................29

Voltage and Current Specifications for the Extreme Edition Processors .............................30

Voltage and Current Specifications for the Dual-Core Standard Voltage Processors ............32

FSB Differential BCLK Specifications ............................................................................34

AGTL+ Signal Group DC Specifications ........................................................................35

10 CMOS Signal Group DC Specifications..........................................................................36
11 Open Drain Signal Group DC Specifications ..................................................................36
12 Pin Listing by Pin Name .............................................................................................48
13 Pin Listing by Pin Number ..........................................................................................55
14 Signal Description.....................................................................................................62
15 Power Specifications for the Extreme Edition Processor ..................................................71
16 Power Specifications for Dual-Core Standard Voltage Processors .....................................72
17 Thermal Diode Interface ............................................................................................73
18 Thermal Diode Parameters using Transistor Model ........................................................74