Intel AT80604005280AA User Manual
Intel® Xeon® Processor 7500 Datasheet, Volume 1
45
Electrical Specifications
2.7
DC Specifications
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
The V
IO
referred to in these specifications refers to instantaneous V
IO
3.
Based on a test load of 50Ω to V
IOC
4.
Specified for synchronous signals.
5.
R
SYS_TERM
is the termination on the system, not part of the Processor.
Figure 2-10. Input Device Hysteresis
Table 2-24. TAP, Strap Pins, Error, Power-up, RESET, Thermal, VID Signal Group
DC Specifications
Symbol
Parameter
Min
Typ
Max
Units
Notes
1
V
IL
Input Low Voltage
-0.1
0.54
*
V
IOF
V
2,3
V
IH
Input High Voltage
0.86
*
V
IOF
V
2
V
OL
Output Low Voltage
V
IOC
* R
ON
/ (R
ON
+
R
sys_term
)
V
2,5
V
OH
Output High Voltage
V
IOC
V
2
Rtt
On Die Pull Up Termination
42.5
50
57.5
Ohm
T
CO
T
CO
time from SYSCLK pin
till signal valid at output
0.5
2.9
ns
3
Setup
Time
Control Sideband Input
signals with respect to
SYSCLK
900
ps
4
Hold
Time
Control Sideband Input
signals with respect to
SYSCLK
900
ps
4
POC/
Reset
Setup
Time
Power-On Configuration
Setup Time
2
SYSCLK
POC/
Reset
Hold
Time
Power-On Configuration
Hold Time
108
SYSCLK
R
ON
Control Sideband Buffer on
Resistance
8
18
Ohm
I
LI
Input Leakage Current
± 200
μA
Minimum V
P
Maximum V
P
Minimum V
N
Maximum V
N
PECI High Range
PECI Low Range
Valid Input
Signal Range
Signal Range
Minimum
Hysteresis
Hysteresis
V
IO
PECI Ground