Intel Xeon L3406 CM80616005010AA User Manual

162

Datasheet, Volume 2

14

RO

0

TXT.LOCALITY3.OPEN.STS
This bit is set when the TXT.CMD.OPEN.LOCALITY3 command is seen by the 

chipset. It is cleared on reset or when TXT.CMD.CLOSE.LOCALITY3 is seen.
This bit can be used by sw as a positive indication that the command has 

taken effect. Note that hardware should not set or clear this bit until the 

internal hardware will guarantee that incoming cycles will be decoded based 

on the state change caused by the OPEN or CLOSE command.

13

RV

0

12

RV

0

11

RO

0

TXT.MEM-CONFIG-OK.STS (TXTMCONFOKSTS)
This bit indicates whether the chipset has received and accepted the 

TXT.CMD.MEM-CONFIG-CHECKED TXT command. This bit is cleared by PCI 

reset or by the TXT.CMD.UNLOCK-MEMCONFIG command.
0 = Indicates that memory configuration checking has not been performed. 

This is the default state after PCI reset. This bit is also set to 0 after the 

chipset has accepted the TXT.CMD.UNLOCK-MEM-CONFIG command.

0 = Indicates that memory configuration checking has been performed. This 

bit is set to one when the chipset accepts the TXT.CMD.MEM-CONFIG-

CHECKED TXT command.

10:8

RV

0

7

RO

0

TXT.PRIVATE-OPEN.STS
This bit will be set to 1 when the TXT.CMD.OPEN-PRIVATE is performed.This bit 

cleared by the TXT.CMD.CLOSE-PRIVATE or by a system reset.

6

RO

0

TXT.MEM-CONFIG-LOCK.STS
This bit will be set to 1 when the memory configuration has been locked.This 

bit is cleared by TXT.CMD.UNLOCK.MEMCONFIG or by a system reset.
When this bit is set registers VTCTRL (D20:F0:7Ch) and VTBAR (D20:F0:78h) 

will be locked. And these registers will be unlocked when this bit is clear.

5

RO

0

TXT.BASE.LOCKED.STS
This bit will be set to 1 when the TXT.LOCK.BASE command is issued.
This bit is cleared by TXT.UNLOCK.BASE or by a system reset.
When this bit is set, TXT space registers TXT_HEAP_BASE, TXT_HEAP_SIZE, 

TXT_MSEG_BASE, TXT_MSEG_SIZE, TXT_SCRATCHPAD0 and 

TXT_SCRATCHPAD1 will be locked. And these registers will be unlocked when 

this bit is clear.

4:2

RV

0h

1

RO

1

SEXIT.DONE.STS
This bit is set when all of the bits in the TXT.THREADS.JOIN register are clear 0 

(using TXT_JOINS_CLEAR command). Thus, this bit will be set immediately 

after reset (since the bits are all 0).

0

RO

0

SENTER.DONE.STS
The chipset sets this bit when TXT.THREADS.JOIN = TXT.THREAD.EXISTS and 

TXT.THREADS.JOIN != 0.
When any of the threads does the TXT.JOINS.CLEAR to clear the set bit in 

TXT.THREADS.JOIN register, the TXT.THREADS.JOIN and 

TXT.THREADS.EXISTS registers will not be equal, so the chipset will clear this 

bit.