Intel Xeon L3406 CM80616005010AA User Manual
Product codes
CM80616005010AA
Datasheet, Volume 2
177
Processor Integrated I/O (IIO) Configuration Registers
3.7.1.4
QPI[0]LCL—Intel
®
QuickPath Interconnect Link Control
Register per Intel QuickPath Interconnect port. This register is used for Control of Link
Layer.
Layer.
Register:
QPI[0]LCL
Device: 16
Function:
0
Offset:
C4h
Bit
Attr
Default
Description
31:21
RO
0
Reserved
20
RWDS
0
L1 enable
Bit is ANDed with the parameter exchanged value for L1 to determine if the
Bit is ANDed with the parameter exchanged value for L1 to determine if the
link may enter L1.
0 = Disable
1 = Enable
0 = Disable
1 = Enable
19:0
RO
0
Reserved