Intel Xeon L3406 CM80616005010AA User Manual

Datasheet, Volume 2

87

Controls the resources associated with PCI Express Virtual Channel 0.

31:24

RO

0h

Reserved for Port Arbitration Table Offset

23

RO

0

22:16

RO

0h

Reserved for Maximum Time Slots

15

RO

0h

Reject Snoop Transactions (REJSNPT)
0 = Transactions with or without the No Snoop bit set within the TLP header 

are allowed on this VC.

1 = Any transaction without the No Snoop bit set within the TLP header will 

be rejected as an Unsupported Request.

14:8

RO

0h

7:0

RO

01h

Port Arbitration Capability (PAC)
Having only Bit 0 set indicates that the only supported arbitration scheme 

for this VC is non-configurable hardware-fixed.

31

RO

1

Virtual Channel 0 Enable (VC0E)
For VC0, this is hardwired to 1 and read only as VC0 can never be disabled.

30:27

RO

0h

26:24

RO

0h

Virtual Channel 0 ID (VC0ID)
Assigns a VC ID to the VC resource. For VC0 this is hardwired to 0 and read 

only.

23:20

RO

0h

19:17

RW

0h

Port Arbitration Select (PAS)
Configures the VC resource to provide a particular Port Arbitration service. 

Valid value for this field is a number corresponding to one of the asserted bits 

in the Port Arbitration Capability field of the VC resource. Because only bit 0 of 

that field is asserted.
This field will always be programmed to 1.

16:8

RO

0h

7:1

RW

7Fh

Traffic Class/Virtual Channel 0 Map (TCVC0M)
Indicates the TCs (Traffic Classes) that are mapped to the VC resource. Bit 

locations within this field correspond to TC values.
For example, when Bit 7 is set in this field, TC7 is mapped to this VC resource. 

When more than one bit in this field is set, it indicates that multiple TCs are 

mapped to the VC resource. In order to remove one or more TCs from the 

TC/VC Map of an enabled VC, software must ensure that no new or 

outstanding transactions with the TC labels are targeted at the given Link.

0

RO

1

Traffic Class 0/Virtual Channel 0 Map (TC0VC0M)
Traffic Class 0 is always routed to VC0.