Intel Xeon L3406 CM80616005010AA User Manual

Product codes
CM80616005010AA
Page of 302
Datasheet, Volume 2
93
Processor Integrated I/O (IIO) Configuration Registers
Table 3-8.
Core Registers (Device 8, Function 0) — Offset 100h–1FFh
Reserved for PCI Express header space
100h
VTBAR
180h
104h
VTGENCTRL
184h
IIOBUSNO
108h
VTISOCHCTRL
188h
LMMIOL.LIMIT
LMMIOL.BASE
10Ch
VTGENCTRL2
18Ch
LMMIOH.LIMIT
LMMIOH.BASE
110h
VTSTS
190h
LMMIOH.BASEU
114h
194h
LMMIOH.LIMITU
118h
198h
LCFGBUS.L
IMIT
LCFGBUS.B
ASE
11Ch
19Ch
120h
1A0h
GMMIOL.LIMIT
GMMIOL.BASE
124h
1A4h
GMMIOH.LIMIT
GMMIOH.BASE
128h
1A8h
GMMIOH.BASEU
12Ch
1ACh
GMMIOH.LIMITU
130h
1B0h
GCFGBUS.L
IMIT
GCFGBUS.
BASE
134h
1B4h
MESEGBASE
138h
1B8h
13Ch
1BCh
MESEGMASK
140h
1C0h
144h
1C4h
148h
1C8h
14Ch
1CCh
150h
1D0h
154h
1D4h
158h
1D8h
15Ch
1DCh
160h
1E0h
164h
1E4h
168h
1E8h
16Ch
1ECh
170h
1F0h
174h
1F4h
178h
1F8h
17Ch
1FCh