Intel LF80550KF0804M Data Sheet
Dual-Core Intel® Xeon® Processor 7100 Series Datasheet
89
Features
via a 1 kΩ or smaller resistor, or leaving the pins floating to achieve the Hi-Z state. If
the system designer wants to drive the SM_TS_A[1:0] pins with logic, the designer
must still ensure that the pins are at valid input levels prior to or while the SM_VCC
supply ramps up. The system designer must also ensure that their particular
implementation does not add excessive capacitance to the address inputs. Excess
capacitance at the address inputs may cause address recognition problems. Refer to
the appropriate platform design guide document.
must still ensure that the pins are at valid input levels prior to or while the SM_VCC
supply ramps up. The system designer must also ensure that their particular
implementation does not add excessive capacitance to the address inputs. Excess
capacitance at the address inputs may cause address recognition problems. Refer to
the appropriate platform design guide document.
shows a logical diagram of the pin connections.
describe the address pin connections and how they affect the addressing of the
devices.
devices.
Notes:
1.
Upper address bits are decoded in conjunction with the device select pins.
2.
A tri-state or “Z” state on this pin is achieved by leaving this pin unconnected.
Note:
System management software must be aware of the processor dependent addresses
for the thermal sensor.
Note:
1.
This addressing scheme will support up to 8 processors on a single SMBus.
Table 7-2.
Thermal Sensor SMBus Addressing
Address
(Hex)
Upper
Address
1
Device Select
8-bit Address Word on Serial Bus
SM_TS_A1
SM_TS_A0
b[7:0]
3Xh
0011
0
0
0
0
Z
2
1
0011000Xb
0011001Xb
0011010Xb
5Xh
0101
Z
2
Z
2
Z
2
0
Z
2
1
0101001Xb
0101010Xb
0101011Xb
9Xh
1001
1
1
1
0
Z
2
1
1001100Xb
1001101Xb
1001110Xb
Table 7-3.
Memory Device SMBus Addressing
Address
(Hex)
Upper
Address
1
Device Select
R/W
bits 7-4
SM_EP_A2
bit 3
SM_EP_A1
bit 2
SM_EP_A0
bit 1
bit 0
A0h/A1h
1010
0
0
0
X
A2h/A3h
1010
0
0
1
X
A4h/A5h
1010
0
1
0
X
A6h/A7h
1010
0
1
1
X
A8h/A9h
1010
1
0
0
X
AAh/ABh
1010
1
0
1
X
ACh/ADh
1010
1
1
0
X
AEh/AFh
1010
1
1
1
X