Intel E5503 AT80602003636AA User Manual
Product codes
AT80602003636AA
Thermal Specifications
124
Intel
®
Xeon
®
Processor 5500 Series Datasheet, Volume 1
6.3.2.9.2
Transaction ID
For all MbxSend() commands that complete successfully, the passing completion code
(0x4X) includes a 4-bit Transaction ID (‘X’). That ID is the key to the mailbox and must
be sent when retrieving response data and releasing the lock by using the MbxGet()
command.
(0x4X) includes a 4-bit Transaction ID (‘X’). That ID is the key to the mailbox and must
be sent when retrieving response data and releasing the lock by using the MbxGet()
command.
The Transaction ID is generated internally by the processor and has no relationship to
the originator of the request. On Intel Xeon processor 5500 series, only a single
outstanding Transaction ID is supported. Therefore, it is recommended that all devices
requesting actions or data from the Mailbox complete their requests and release their
semaphore in a timely manner.
the originator of the request. On Intel Xeon processor 5500 series, only a single
outstanding Transaction ID is supported. Therefore, it is recommended that all devices
requesting actions or data from the Mailbox complete their requests and release their
semaphore in a timely manner.
In order to accommodate future designs, software or hardware utilizing the PECI
mailbox must be capable of supporting Transaction IDs between 0 and 15.
mailbox must be capable of supporting Transaction IDs between 0 and 15.
6.3.2.9.3
Releasing the Mailbox
The mailbox associated with a particular Transaction ID is only unlocked / released
upon successful transmission of the last bit of the Read FCS. If the originator aborts the
transaction prior to transmission of this bit (presumably due to an FCS failure), the
semaphore is maintained and the MbxGet() command may be retried.
upon successful transmission of the last bit of the Read FCS. If the originator aborts the
transaction prior to transmission of this bit (presumably due to an FCS failure), the
semaphore is maintained and the MbxGet() command may be retried.
6.3.2.9.4
Mailbox Timeouts
The mailbox is a shared resource that can result in artificial bandwidth conflicts among
multiple querying processes that are sharing the same originator interface. The
interface response time is quick, and with rare exception, back to back MbxSend() and
MbxGet() commands should result in successful execution of the request and release of
the mailbox. In order to guarantee timely retrieval of response data and mailbox
release, the mailbox semaphore has a timeout policy. If the PECI bus has a cumulative
‘0 time of 1ms since the semaphore was acquired, the semaphore is automatically
cleared. In the event that this timeout occurs, the originating agent will receive a failed
completion code upon issuing a MbxGet() command, or even worse, it may receive
corrupt data if this MbxGet() command so happens to be interleaved with an
MbxSend() from another process. Please refer to
multiple querying processes that are sharing the same originator interface. The
interface response time is quick, and with rare exception, back to back MbxSend() and
MbxGet() commands should result in successful execution of the request and release of
the mailbox. In order to guarantee timely retrieval of response data and mailbox
release, the mailbox semaphore has a timeout policy. If the PECI bus has a cumulative
‘0 time of 1ms since the semaphore was acquired, the semaphore is automatically
cleared. In the event that this timeout occurs, the originating agent will receive a failed
completion code upon issuing a MbxGet() command, or even worse, it may receive
corrupt data if this MbxGet() command so happens to be interleaved with an
MbxSend() from another process. Please refer to
regarding failed completion codes from MbxGet() commands.
Timeouts are undesirable, and the best way to avoid them and guarantee valid data is
for the originating agent to always issue MbxGet() commands immediately following
MbxSend() commands.
for the originating agent to always issue MbxGet() commands immediately following
MbxSend() commands.
Alternately, mailbox timeout can be disabled. BIOS may write MSR
MISC_POWER_MGMT (0x1AA), bit 11 to 0b1 in order to force a disable of this
automatic timeout.
MISC_POWER_MGMT (0x1AA), bit 11 to 0b1 in order to force a disable of this
automatic timeout.
6.3.2.9.5
Response Latency
The PECI mailbox interface is designed to have response data available within plenty of
margin to allow for back-to-back MbxSend() and MbxGet() requests. However, under
rare circumstances that are out of the scope of this specification, it is possible that the
response data is not available when the MbxGet() command is issued. Under these
circumstances, the MbxGet() command will respond with an Abort FCS and the
originator should re-issue the MbxGet() request.
margin to allow for back-to-back MbxSend() and MbxGet() requests. However, under
rare circumstances that are out of the scope of this specification, it is possible that the
response data is not available when the MbxGet() command is issued. Under these
circumstances, the MbxGet() command will respond with an Abort FCS and the
originator should re-issue the MbxGet() request.