Intel 2 Duo T7700 LE80537GG0564M User Manual

Datasheet

85

EMTTM is a processor feature that enhances Intel Thermal Monitor 2 with a processor 

throttling algorithm known as Adaptive Intel Thermal Monitor 2. Adaptive Intel Thermal 

Monitor 2 transitions to intermediate operating points, rather than directly to the LFM, 

once the processor has reached its thermal limit and subsequently searches for the 

highest possible operating point. Please ensure this feature is enabled and supported in 

the BIOS. Also with EMTTM enabled, the operating system can request the processor to 

throttling to any point between Intel Dynamic Acceleration Technology frequency and 

SuperLFM frequency as long as these features are enabled in the BIOS and supported 

by the processor. The Intel Thermal Monitor automatic mode and Enhanced Multi 

Threaded Thermal Monitoring must be enabled through BIOS for the processor to be 

operating within specifications.

Intel Thermal Monitor 1, Intel Thermal Monitor 2 and EMTTM features are collectively 

referred to as Adaptive Thermal Monitoring features. Intel recommends Intel Thermal 

Monitor 1 and 2 be enabled on the processors.

Intel Thermal Monitor 1 and 2 can co-exist within the processor. If both Intel Thermal 

Monitor 1 and 2 bits are enabled in the auto-throttle MSR, Intel Thermal Monitor 2 

takes precedence over Intel Thermal Monitor 1. However, if Force Intel Thermal Monitor 

1 over Intel Thermal Monitor 2 is enabled in MSRs via BIOS and Intel Thermal Monitor 

2 is not sufficient to cool the processor below the maximum operating temperature, 

then Intel Thermal Monitor 1 also activates to help cool down the processor. 

If a processor load based Enhanced Intel SpeedStep Technology transition (through 

MSR write) is initiated when a Intel Thermal Monitor 2 period is active, there are two 

possible results:

1. If the processor load based Enhanced Intel SpeedStep Technology transition target 

frequency is higher than the Intel Thermal Monitor 2 transition-based target 

frequency, the processor load-based transition deferrs until the Intel Thermal 

Monitor 2 event has been completed.

2. If the processor load-based Enhanced Intel SpeedStep Technology transition target 

frequency is lower than the Intel Thermal Monitor 2 transition-based target 

frequency, the processor transitions to the processor load-based Enhanced Intel 

SpeedStep Technology target frequency point.

The TCC may also be activated via on-demand mode. If bit 4 of the ACPI Intel Thermal 

Monitor control register is written to a 1, the TCC activates immediately independent of 

the processor temperature. When using on-demand mode to activate the TCC, the duty 

cycle of the clock modulation is programmable via bits 3:1 of the same ACPI Intel 

Thermal Monitor control register. In automatic mode, the duty cycle is fixed at 50% on, 

50% off, however in on-demand mode, the duty cycle can be programmed from 12.5% 

on/ 87.5% off, to 87.5% on/12.5% off in 12.5% increments. On-demand mode may be 

used at the same time automatic mode is enabled, however, if the system tries to 

enable the TCC via on-demand mode at the same time automatic mode is enabled and 

a high temperature condition exists, automatic mode takes precedence. 

An external signal, PROCHOT# (processor hot) is asserted when the processor detects 

that its temperature is above the thermal trip point. Bus snooping and interrupt 

latching are also active while the TCC is active. 

Besides the thermal sensor and thermal control circuit, the Intel Thermal Monitor also 

includes one ACPI register, one performance counter register, three MSR, and one I/O 

pin (PROCHOT#). All are available to monitor and control the state of the Intel Thermal 

Monitor feature. The Intel Thermal Monitor can be configured to generate an interrupt 

upon the assertion or deassertion of PROCHOT#. 

PROCHOT# is not be asserted when the processor is in the Stop Grant, Sleep, Deep 

Sleep, and Deeper Sleep low power states, hence the thermal diode reading must be 

used as a safeguard to maintain the processor junction temperature within maximum 

specification. If the platform thermal solution is not able to maintain the processor