Intel L5408 EU80574JH046N Data Sheet

Product codes
EU80574JH046N
Page of 118
Thermal Specifications
94
6.2.5
THERMTRIP# Signal
Regardless of whether or not Intel® Thermal Monitor 1 or Intel® Thermal Monitor 2 is 
enabled, in the event of a catastrophic cooling failure, the processor will automatically 
shut down when the silicon has reached an elevated temperature (refer to the 
THERMTRIP# definition in 
). At this point, the FSB signal THERMTRIP# will go 
active and stay active as described in 
. THERMTRIP# activation is independent 
of processor activity and does not generate any bus cycles. Intel also recommends the 
removal of V
TT
.
6.3
Platform Environment Control Interface (PECI) 
6.3.1
Introduction
PECI offers an interface for thermal monitoring of Intel processor and chipset 
components. It uses a single wire, thus alleviating routing congestion issues. 
 shows an example of the PECI topology in a system with Quad-Core Intel® 
Xeon® Processor 5400 Series. PECI uses CRC checking on the host side to ensure 
reliable transfers between the host and client devices. Also, data transfer speeds across 
the PECI interface are negotiable within a wide range (2Kbps to 2Mbps). The PECI 
interface on the Quad-Core Intel® Xeon® Processor 5400 Series is disabled by default 
and must be enabled through BIOS.
6.3.1.1
T
CONTROL
 and TCC Activation on PECI-based Systems
Fan speed control solutions based on PECI utilize a T
CONTROL
 value stored in the 
processor IA32_TEMPERATURE_TARGET MSR. The T
CONTROL
 MSR uses the same offset 
temperature format as PECI though it contains no sign bit. Thermal management 
devices should infer the T
CONTROL
 value as negative. Thermal management algorithms 
Figure 6-8. Quad-Core Intel® Xeon® Processor 5400 Series PECI Topology
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