Intel 9150M NE80567KF028015 User Manual
Product codes
NE80567KF028015
Electrical Specifications
26
Intel
®
Itanium
®
Processor 9300 Series Datasheet
2.6.2
Uncore, Core and Cache Tolerances
2.6.2.1
Uncore Static and Transient Tolerances
specify static and transient tolerances for the uncore
outputs.
2. During system power on, the pulse inrush (I
CC_CORE_STEP
)
can be as high as 130A peak-to-peak.
3. I
CC_UNCORE_TDC
is the sustained (DC equivalent) current that the processor uncore is capable of drawing indefinitely and should
be used for the Ararat voltage regulator temperature assessment. The Ararat voltage regulator is responsible for monitoring its
temperature and asserting the VR_FAN_N, VR_THERMALERT_N, VR_THERMTRIP_N signals sequentially to inform the processor
and platform of a thermal excursion. Of the three signals, only VR_THERMALTERT_N is monitored by the processor. Please see
the Ararat Voltage Regulator Design Guide for further details. The processor is capable of drawing I
CC_UNCORE_TDC
indefinitely.
This parameter is based on design characterization and is not tested.
4. During system power on, the pulse inrush (I
CC_UNCORE_STEP
)
can be as high as 40A peak-to-peak.
5. I
CC_CACHE_TDC
is the sustained (DC equivalent) current that the processor cache is capable of drawing indefinitely and should be
used for the Ararat voltage regulator temperature assessment. The Ararat voltage regulator is responsible for monitoring its
temperature and asserting the VR_FAN_N, VR_THERMALERT_N, VR_THERMTRIP_N signals sequentially to inform the processor
and platform of a thermal excursion. Of the three signals, only VR_THERMALTERT_N is monitored by the processor. Please see
the Ararat Voltage Regulator Design Guide for further details. The processor is capable of drawing I
CC_CACHE_TDC
indefinitely. This
parameter is based on design characterization and is not tested.
6. During system power on, the pulse inrush (I
CC_CACHE_STEP
)
can be as high as 40A peak-to-peak.
7. The I
CC_IO
current specification applies to the total current from VCCIO and VCCIO_FBD pins.
Figure 2-9. Processor I
CC_CORE
Load Current versus Time
0.01
100
1000
10
1
0.1
ITDC
IMax
Time Duration (us)
Su
s
tai
ne
d Cu
rr
e
n
t (A
)
Table 2-11. V
CCUNCORE
Static and Transient Tolerance (Sheet 1 of 2)
Uncore
Current (A)
Voltage Deviation from VID Setting (V)1,2,3,4
I
CC_UNCORE
V
CC_Max
V
CC_Typ
V
CC_Min
0
VID - 0
VID - 0.02
VID - 0.04
5
VIDIntel
®
Itanium
®
Processor 9300 Series
Datasheet - 0.02
VID - 0.04
VID - 0.06
10
VID - 0.04
VID - 0.06
VID - 0.08
15
VID - 0.06
VID - 0.08
VID - 0.1
20
VID - 0.08
VID - 0.1
VID - 0.12
25
VID - 0.1
VID - 0.12
VID - 0.14
30
VID - 0.12
VID - 0.14
VID - 0.16
35
VID - 0.14
VID - 0.16
VID - 0.18