Intel W3580 AT80601002274AB User Manual

Product codes
AT80601002274AB
Page of 106
Intel® Xeon® Processor 3500 Series Datasheet Volume 1 
85
Thermal Specifications
The Thermal Monitor does not require any additional hardware, software drivers, or 
interrupt handling routines. The following sections provide more details on the different 
TCC mechanisms used by the Intel Xeon Processor 3500 Series.
6.2.2.1
Frequency/VID Control
When the Digital Temperature Sensor (DTS) reaches a value of 0 (DTS temperatures 
reported via PECI may not equal zero when PROCHOT# is activated, see 
 for 
further details), the TCC will be activated and the PROCHOT# signal will be asserted. 
This indicates the processors' temperature has met or exceeded the factory calibrated 
trip temperature and it will take action to reduce the temperature. 
Upon activation of the TCC, the processor will stop the core clocks, reduce the core 
ratio multiplier by 1 ratio and restart the clocks. All processor activity stops during this 
frequency transition which occurs within 2 us. Once the clocks have been restarted at 
the new lower frequency, processor activity resumes while the voltage requested by the 
VID lines is stepped down to the minimum possible for the particular frequency. 
Running the processor at the lower frequency and voltage will reduce power 
consumption and should allow the processor to cool off. If after 1ms the processor is 
still too hot (the temperature has not dropped below the TCC activation point, DTS 
still = 0 and PROCHOT is still active) then a second frequency and voltage transition will 
take place. This sequence of temperature checking and Frequency/VID reduction will 
continue until either the minimum frequency has been reached or the processor 
temperature has dropped below the TCC activation point.
If the processor temperature remains above the TCC activation point even after the 
minimum frequency has been reached, then clock modulation (described below) at that 
minimum frequency will be initiated.
There is no end user software or hardware mechanism to initiate this automated TCC 
activation behavior. 
A small amount of hysteresis has been included to prevent rapid active/inactive 
transitions of the TCC when the processor temperature is near the TCC activation 
temperature. Once the temperature has dropped below the trip temperature, and the 
hysteresis timer has expired, the operating frequency and voltage transition back to 
the normal system operating point via the intermediate VID/frequency points. 
Transition of the VID code will occur first, to insure proper operation as the frequency is 
increased. Refer to 
 for an illustration of this ordering.