Intel QX9775 EU80574XL088N Data Sheet
Product codes
EU80574XL088N
4
Datasheet
Figures
2-1 Input Device Hysteresis.............................................................................................23
2-2 Processor Load Current versus Time............................................................................27
2-3 Processor VCC Static and Transient Tolerance Load Lines ..............................................29
2-4 VCC Overshoot Example Waveform.............................................................................31
2-5 Differential Clock Waveform.......................................................................................34
2-6 Differential Clock Crosspoint Specification ....................................................................34
2-7 Differential Rising and Falling Edge Rates.....................................................................34
3-1 Processor Package Assembly Sketch ...........................................................................35
3-2 Processor Package Drawing (Sheet 1 of 3) ...................................................................36
3-3 Processor Package Drawing (Sheet 2 of 3) ...................................................................37
3-4 Processor Package Drawing (Sheet 3 of 3) ...................................................................38
3-5 Processor Top-side Markings (Example).......................................................................41
3-6 Processor Land Coordinates, Top View.........................................................................42
3-7 Processor Land Coordinates, Bottom View....................................................................43
5-1 Processor Thermal Profile ..........................................................................................76
5-2 Case Temperature (TCASE) Measurement Location .......................................................78
5-3 Thermal Monitor 2 Frequency and Voltage Ordering ......................................................80
5-4 Processor PECI Topology ...........................................................................................82
5-5 Conceptual Fan Control Diagram of PECI-based Platforms ..............................................83
6-1 Stop Clock State Machine ..........................................................................................86
2-2 Processor Load Current versus Time............................................................................27
2-3 Processor VCC Static and Transient Tolerance Load Lines ..............................................29
2-4 VCC Overshoot Example Waveform.............................................................................31
2-5 Differential Clock Waveform.......................................................................................34
2-6 Differential Clock Crosspoint Specification ....................................................................34
2-7 Differential Rising and Falling Edge Rates.....................................................................34
3-1 Processor Package Assembly Sketch ...........................................................................35
3-2 Processor Package Drawing (Sheet 1 of 3) ...................................................................36
3-3 Processor Package Drawing (Sheet 2 of 3) ...................................................................37
3-4 Processor Package Drawing (Sheet 3 of 3) ...................................................................38
3-5 Processor Top-side Markings (Example).......................................................................41
3-6 Processor Land Coordinates, Top View.........................................................................42
3-7 Processor Land Coordinates, Bottom View....................................................................43
5-1 Processor Thermal Profile ..........................................................................................76
5-2 Case Temperature (TCASE) Measurement Location .......................................................78
5-3 Thermal Monitor 2 Frequency and Voltage Ordering ......................................................80
5-4 Processor PECI Topology ...........................................................................................82
5-5 Conceptual Fan Control Diagram of PECI-based Platforms ..............................................83
6-1 Stop Clock State Machine ..........................................................................................86
Tables
2-1 Core Frequency to FSB Multiplier Configuration.............................................................15
2-2 BSEL[2:0] Frequency Table........................................................................................16
2-3 Voltage Identification Definition..................................................................................18
2-4 Loadline Selection Truth Table for LL_ID[1:0]...............................................................19
2-5 Market Segment Selection Truth Table for MS_ID[1:0] ..................................................19
2-6 FSB Signal Groups ....................................................................................................20
2-7 AGTL+ Signal Description Table..................................................................................21
2-8 Non AGTL+ Signal Description Table ...........................................................................21
2-9 Signal Reference Voltages .........................................................................................22
2-10PECI DC Electrical Limits ...........................................................................................23
2-11Processor Absolute Maximum Ratings..........................................................................25
2-12Voltage and Current Specifications..............................................................................26
2-13Processor VCC Static and Transient Tolerance ..............................................................28
2-14AGTL+ Signal Group DC Specifications ........................................................................29
2-15CMOS Signal Input/Output Group and TAP Signal Group
2-2 BSEL[2:0] Frequency Table........................................................................................16
2-3 Voltage Identification Definition..................................................................................18
2-4 Loadline Selection Truth Table for LL_ID[1:0]...............................................................19
2-5 Market Segment Selection Truth Table for MS_ID[1:0] ..................................................19
2-6 FSB Signal Groups ....................................................................................................20
2-7 AGTL+ Signal Description Table..................................................................................21
2-8 Non AGTL+ Signal Description Table ...........................................................................21
2-9 Signal Reference Voltages .........................................................................................22
2-10PECI DC Electrical Limits ...........................................................................................23
2-11Processor Absolute Maximum Ratings..........................................................................25
2-12Voltage and Current Specifications..............................................................................26
2-13Processor VCC Static and Transient Tolerance ..............................................................28
2-14AGTL+ Signal Group DC Specifications ........................................................................29
2-15CMOS Signal Input/Output Group and TAP Signal Group
2-16Open Drain Output Signal Group DC Specifications........................................................30
2-17VCC Overshoot Specifications.....................................................................................30
2-18AGTL+ Bus Voltage Definitions ...................................................................................32
2-19FSB Differential BCLK Specifications............................................................................33
3-1 Package Loading Specifications...................................................................................39
3-2 Package Handling Guidelines......................................................................................40
3-3 Processor Materials...................................................................................................40
4-1 Land Listing by Land Name ........................................................................................46
4-2 Land Listing by Land Number .....................................................................................55
4-1 Signal Definitions .....................................................................................................64
5-1 Processor Thermal Specifications ................................................................................76
5-2 Processor Thermal Profile Table ..................................................................................77
5-3 GetTemp0() GetTemp1()Error Codes...........................................................................84
6-1 Power-On Configuration Option Lands .........................................................................85
6-2 Extended HALT Maximum Power.................................................................................87
2-17VCC Overshoot Specifications.....................................................................................30
2-18AGTL+ Bus Voltage Definitions ...................................................................................32
2-19FSB Differential BCLK Specifications............................................................................33
3-1 Package Loading Specifications...................................................................................39
3-2 Package Handling Guidelines......................................................................................40
3-3 Processor Materials...................................................................................................40
4-1 Land Listing by Land Name ........................................................................................46
4-2 Land Listing by Land Number .....................................................................................55
4-1 Signal Definitions .....................................................................................................64
5-1 Processor Thermal Specifications ................................................................................76
5-2 Processor Thermal Profile Table ..................................................................................77
5-3 GetTemp0() GetTemp1()Error Codes...........................................................................84
6-1 Power-On Configuration Option Lands .........................................................................85
6-2 Extended HALT Maximum Power.................................................................................87