Intel AT80604004884AA User Manual

Page of 172
Signal Definitions
108
Intel® Xeon® Processor 7500 Datasheet, Volume 1
FBD0SBOCLK[A/B][P/N]0
O
These differential pair output clock signals generated from Intel® Xeon® processor 
7500 series are inputs to the branch zero, channel A and B of Intel® Scalable 
Memory Interconnects.
Example: FBD0SBICLKAP0 Intel® Scalable Memory Interconnect branch 0, south 
bound clock output signal of channel A and positive bit of the differential pair. 
FBD1NBI[C/D][P/N][13:0]
I
These differential pair output data signals generated from Intel® Xeon® processor 
7500 series are inputs to the branch one, channel C and D of Intel® Scalable 
Memory Interconnects.
Example: FBD1NBIAP[0] Intel® Scalable Memory Interconnect branch 1, North 
bound data input lane 0 signal of channel A and positive bit of the differential pair. 
FBD1NBICLK[C/D][P/N]0 
I
These differential pair clock signals generated from the branch one, channel C and D 
of Intel® Scalable Memory Interconnects are input to the Intel® Xeon® processor 
7500 series.
Example: FBD1NBICLKAP0 Intel® Scalable Memory Interconnect branch 1, 
Northbound clock input signal of channel A and positive bit of the differential pair. 
FBD1SBO[C/D][P/N][10:0]
O
These differential pair output data signals generated from Intel® Xeon® processor 
7500 series to the branch one, channel C and D of Intel® Scalable Memory 
Interconnects.
Example: FBD1SBOAP[0] Intel® Scalable Memory Interconnect branch 1, South 
bound data Output lane 0 signal of channel A and positive bit of the differential pair.
Table 5-1.
Signal Definitions (Sheet 2 of 6)
Name
Type
Description
Intel® 
SMI
0
SB
O
CLK
A/B
P/N
Interface 
Name
Branch 
Number
South 
Bound
Output
Clock
Channel
Differential 
Pair
Polarity 
Positive/
Negative
Intel® 
SMI
1
NB
I
C/D
P/N
[13:0]
Interface 
Name
Branch 
Number
North 
Bound
Input
Channe
l
Differential 
Pair
Polarity 
Positive/
Negative
Lane 
Number
Intel® 
SMI
1
NB
I
CLK
C/D
P/N
Interface 
Name
Branch 
Number
North 
Bound
Input
Clock
Channel
Differential 
Pair
Polarity 
Positive/
Negative
Intel® 
SMI
1
NB
O
C/D
P/N
[10:0]
Interface 
Name
Branch 
Number
North 
Bound
Output
Channel
Differential 
Pair
Polarity 
Positive/
Negative
Lane 
Number