Intel E6540 HH80557PJ0534M User Manual

35

PECI is an Intel proprietary one-wire interface that provides a communication channel 

between Intel processors (may also include chipset components in the future) and 

external thermal monitoring devices. The processor contains Digital Thermal Sensors 

(DTS) distributed throughout die. These sensors are implemented as analog-to-digital 

converters calibrated at the factory for reasonable accuracy to provide a digital 

representation of relative processor temperature. PECI provides an interface to relay 

the highest DTS temperature within a die to external management devices for thermal/

fan speed control. More detailed information is available in the Platform Environment 

Control Interface (PECI) Specification. 

1.

V

TT

 supplies the PECI interface. PECI behavior does not affect V

TT

 min/max specifications. Refer

to 

 for V

TT

 specifications. 

V

in

Input Voltage Range

-0.15

V

TT

V

V

hysteresis

Hysteresis

0.1 * V

TT

—

V

2

2.

The input buffers use a Schmitt-triggered input design for improved noise immunity. 

V

n

Negative-edge threshold voltage

0.275 * V

TT

0.500 * V

TT

V

V

p

Positive-edge threshold voltage

0.550 * V

TT

0.725 * V

TT

V

I

source

High level output source
(V

OH

 = 0.75 * V

TT)

-6.0

N/A

mA

I

sink

Low level output sink
(V

OL

 = 0.25 * V

TT

)

0.5

1.0

mA

I

leak+

High impedance state leakage to V

TT

 

N/A

50

µA

3

3.

The leakage specification applies to powered devices on the PECI bus.

I

leak-

High impedance leakage to GND 

N/A

10

µA

C

bus

Bus capacitance per node

N/A

10

pF

4

4. One node is counted for each client and one node for the system host. Extended trace lengths

might appear as additional nodes.

V

noise

Signal noise immunity above 300 MHz

0.1 * V

TT

—

V

p-p