Intel AT80604004881AA User Manual
Thermal Specifications
122
Intel® Xeon® Processor 7500 Datasheet, Volume 1
temperature. There are two ways to implement On-Demand mode. If bit 4 of the
IA32_CLOCK_MODULATION MSR is set to a ‘1’, the processor will immediately reduce
its power consumption via modulation (starting and stopping) of the internal core clock,
independent of the processor temperature. Also, a write the P_CNT I/O address, the
processor will immediately reduce power consumptions as well.
IA32_CLOCK_MODULATION MSR is set to a ‘1’, the processor will immediately reduce
its power consumption via modulation (starting and stopping) of the internal core clock,
independent of the processor temperature. Also, a write the P_CNT I/O address, the
processor will immediately reduce power consumptions as well.
The P_CNT I/O address write controls all active cores. The MSR write only impacts the
core that performed the MSR write. The P_CNT I/O address write takes priority over the
MSR write.
core that performed the MSR write. The P_CNT I/O address write takes priority over the
MSR write.
When using On-Demand mode, the duty cycle of the clock modulation is programmable
via bits 3:1 of the same IA32_CLOCK_MODULATION MSR. In On-Demand mode, the
duty cycle can be programmed from 12.5% on/ 87.5% off to 87.5% on/12.5% off in
12.5% increments. On-Demand mode may be used in conjunction with the Thermal
Monitor; however, if the system tries to enable On-Demand mode at the same time the
TCC is engaged, the factory configured duty cycle of the TCC will override the duty
cycle selected by the On-Demand mode.
via bits 3:1 of the same IA32_CLOCK_MODULATION MSR. In On-Demand mode, the
duty cycle can be programmed from 12.5% on/ 87.5% off to 87.5% on/12.5% off in
12.5% increments. On-Demand mode may be used in conjunction with the Thermal
Monitor; however, if the system tries to enable On-Demand mode at the same time the
TCC is engaged, the factory configured duty cycle of the TCC will override the duty
cycle selected by the On-Demand mode.
6.2.5
PROCHOT_N Signal
An external signal, PROCHOT_N (processor hot) is asserted when the temperature of
any processor core has reached its factory configured trip point. If Intel® Thermal
Monitor 1 and Intel® Thermal Monitor 2 are enabled (note that Intel® Thermal Monitor
1 and Intel® Thermal Monitor 2 must be enabled for the processor to be operating
within specification), the TCC will be active when PROCHOT_N is asserted. Intel®
Thermal Monitor 2 activates first, and Intel® Thermal Monitor 1 activates only if
needed to further reduce temperature. The processor can be configured to generate an
interrupt upon the assertion or de-assertion of PROCHOT_N. Refer to the Intel
any processor core has reached its factory configured trip point. If Intel® Thermal
Monitor 1 and Intel® Thermal Monitor 2 are enabled (note that Intel® Thermal Monitor
1 and Intel® Thermal Monitor 2 must be enabled for the processor to be operating
within specification), the TCC will be active when PROCHOT_N is asserted. Intel®
Thermal Monitor 2 activates first, and Intel® Thermal Monitor 1 activates only if
needed to further reduce temperature. The processor can be configured to generate an
interrupt upon the assertion or de-assertion of PROCHOT_N. Refer to the Intel
®
64 and
IA-32 Architectures Software Developer’s Manual and the Intel® Xeon® Processor
7500 Series Datasheet, Volume 2 for specific register and programming details.
7500 Series Datasheet, Volume 2 for specific register and programming details.
PROCHOT_N is designed to assert at or a few degrees higher than maximum T
CASE
(as
specified by Thermal Profile) when dissipating TDP power, and cannot be interpreted as
an indication of processor case temperature. This temperature delta accounts for
processor package, lifetime and manufacturing variations and attempts to ensure the
Thermal Control Circuit is not activated below maximum T
an indication of processor case temperature. This temperature delta accounts for
processor package, lifetime and manufacturing variations and attempts to ensure the
Thermal Control Circuit is not activated below maximum T
CASE
when dissipating TDP
power. There is no defined or fixed correlation between the PROCHOT_N trip
temperature, or the case temperature. Thermal solutions must be designed to the
processor specifications and cannot be adjusted based on experimental measurements
of T
temperature, or the case temperature. Thermal solutions must be designed to the
processor specifications and cannot be adjusted based on experimental measurements
of T
CASE
, or PROCHOT_N.
6.2.6
FORCE_PR_N Signal
The FORCE_PR_N (force power reduction) input can be used by the platform to cause
the Intel® Xeon® processor 7500 series to activate the TCC. If the Thermal Monitor is
enabled, the TCC will be activated upon the assertion of the FORCE_PR_N signal.
FORCE_PR_N is an asynchronous input. Assertion of the FORCE_PR_N signal will
activate TCC for all operating processor cores. The TCC will remain active until the
system deasserts FORCE_PR_N. FORCE_PR_N can be used to thermally protect other
system components. To use the VR as an example, when FORCE_PR_N is asserted, the
TCC circuit in the processor will activate, reducing the current consumption of the
processor and the corresponding temperature of the VR.
the Intel® Xeon® processor 7500 series to activate the TCC. If the Thermal Monitor is
enabled, the TCC will be activated upon the assertion of the FORCE_PR_N signal.
FORCE_PR_N is an asynchronous input. Assertion of the FORCE_PR_N signal will
activate TCC for all operating processor cores. The TCC will remain active until the
system deasserts FORCE_PR_N. FORCE_PR_N can be used to thermally protect other
system components. To use the VR as an example, when FORCE_PR_N is asserted, the
TCC circuit in the processor will activate, reducing the current consumption of the
processor and the corresponding temperature of the VR.