Intel AT80604004881AA User Manual

Intel® Xeon® Processor 7500 Datasheet, Volume 1

161

This location provides the checksum of the Processor Core Data Section. Writes to this 
register have no effect.

This section contains silicon-related data relevant to the processor Uncore.

Systems may need to read this offset to decide if all installed processors support the 
same Intel® QPI Link Transfer Rate. The data provided is the transfer rate, rounded to 
a whole number, and reflected in binary coded decimal. Writes to this register have no 
effect.

Example: The Intel® Xeon® processor 7500 series supports a maximum Intel® QPI 
link transfer rate of 6.4 GT/s. Therefore, offset 2Ah-2Bh has a value of 6400.

Systems may need to read this offset to decide if all installed processors support the 
same Intel® QPI Link Transfer Rate. This does not relate to the “link power up” transfer 
rate of 1/4th Ref Clk. The data provided is the transfer rate, rounded to a whole 
number, and reflected in binary coded decimal. Writes to this register have no effect.

Example: The Intel® Xeon® processor 7500 series supports a minimum operating 
Intel® QPI link transfer rate of 4.8 GT/s. Therefore, offset 2Bh-2Ch has a value of 
4800.

The Intel® QPI Version Number is provided as four 8-bit ASCII characters. Writes to 
this register have no effect.

7:0

One-byte checksum of the Processor Data Section

00h- FFh: See 

 for calculation of this value.

15:0

0000h-FFFFh: MHz

15:0

0000h-FFFFh: MHz