Intel AT80604004881AA User Manual

Intel® Xeon® Processor 7500 Datasheet, Volume 1

171

This section provides information on key features that the platform may need to 
understand without powering on the processor.

This location contains a copy of results in EDX[31:0] from Function 1 of the CPUID 
instruction. These details provide instruction and feature support by product family.  
Writes to this register have no effect.

Example: A value of BFEBFBFFh can be found at offset 6C - 6Fh.

This location contains additional feature information from the processor. Writes to this 
register have no effect.

Bit 5 and Bit 6 are mutually exclusive (only one bit will be set).

Bits are set when a feature is present, and cleared when they are not.

This location contains additional feature information from the processor. Writes to this 
register have no effect.

31:0

00000000h-FFFFFFFFF: Feature Flags

7

Multi-Core (set if the processor is a multi-core processor)

6

Serial signature (set if there is a serial signature at offset 5B- 62h)

5

Electronic signature present (set if there is a electronic signature at 5B- 62h)

4

Thermal Sense Device present (set if an SMBus thermal sensor is on package)

3

Reserved

2

OEM EEPROM present (set if there is a scratch ROM at offset 80 - FFh)

1

Core VID present (set if there is a VID provided by the processor)

0

L3 Cache present (set if there is a level-3 cache on the processor)

7

Reserved

6

Intel

® 

Cache Safe Technology

5

Extended Halt State (C1E)

4

Intel

®

 Virtualization Technology