Intel LF80550KG0804M Data Sheet
Dual-Core Intel® Xeon® Processor 7100 Series Datasheet
33
Electrical Specifications
Notes:
1.
I
CACHE
refers to the current drawn by a single Dual-Core Intel® Xeon® Processor 7100 Series cache. The
V
CACHE_MIN
loadline assumes two Dual-Core Intel® Xeon® Processor 7100 Series caches are powered off
one VRM and that the second cache is drawing I
CACHE_MAX
= 40A.
2.
VRM_MAX
and V
VRM_MIN
are VRM voltage regulation requirements measured across the V
CC_CACHE_SENSE
and
V
SS_CACHE_SENSE
pins at the socket.
Notes:
1.
I
CACHE
refers to the current drawn by a single Dual-Core Intel Xeon processor 7100 series cache. The
V
CACHE_MIN
loadline assumes two Dual-Core Intel Xeon processor 7100 series caches are powered off one
VRM and that the second cache is drawing I
CACHE_MAX
= 40A.
2.
VRM_MAX
and V
VRM_MIN
are VRM voltage regulation requirements measured across the V
CC_CACHE_SENSE
and
V
SS_CACHE_SENSE
pins at the socket.
Table 2-12. V
CACHE
Static and Transient Tolerance at the Die Sense Location
I
CACHE
[A]
V
CACHE_MAX
[V]
V
CACHE_TYP
[V]
V
CACHE_MIN
[V]
Notes
0
CVID - 0.000
CVID - 0.041
CVID - 0.082
1,2
5
CVID - 0.021
CVID - 0.065
CVID - 0.109
1,2
10
CVID - 0.043
CVID - 0.089
CVID - 0.136
1,2
15
CVID - 0.064
CVID - 0.113
CVID - 0.163
1,2
20
CVID - 0.085
CVID - 0.138
CVID - 0.190
1,2
25
CVID - 0.106
CVID - 0.162
CVID - 0.217
1,2
30
CVID - 0.128
CVID - 0.186
CVID - 0.244
1,2
35
CVID - 0.149
CVID - 0.210
CVID - 0.271
1,2
40
CVID - 0.170
CVID - 0.234
CVID - 0.298
1,2
Figure 2-5. V
CACHE
Static and Transient Tolerance at the Die Sense Location
CV ID - 0.000
CV ID - 0.050
CV ID - 0.100
CV ID - 0.150
CV ID - 0.200
CV ID - 0.250
CV ID - 0.300
0
5
10
15
20
25
30
35
40
Icache [A]
V
c
ach
e [
V
]
V
Ca ch e
Maxim um
V
Ca ch e
Typic al
V
Ca ch e
Minim um