Cisco Cisco ONS 15454 M2 Multiservice Transport Platform (MSTP) Data Sheet
© 2012 Cisco and/or its affiliates. All rights reserved. This document is Cisco Public.
Page 3 of 13
Figure 2. 40 Gbps Full-Band Tunable CP-DQPSK Transponder Card Block Diagram
Enhanced FEC Capability
The card can support a forward error correction mechanism on trunk and client interfaces.
The trunk port supports FEC and enhanced FEC (EFEC); you cannot disable such mechanisms. The output
bit rate does not depend on the selected algorithm, but you can provision the error coding performance.
●
FEC: Standard G.975 Reed-Salomon algorithm
●
EFEC: Standard G.975.1 (Subclause I.7); two orthogonally concatenated BCH super FEC code. This FEC
scheme contains three parameterizations of the same scheme of two orthogonally interleaved block codes
(BCH). The constructed code is decoded iteratively to achieve the expected performance. EFEC provides 2
to 3 dB of additional reach compared to standard FEC pending OH redundancy (10 percent to 13 percent).
The client port supports an FED mechanism that you can disable:
●
FEC: Standard G.975 Reed-Salomon algorithm
Advanced Modulation Scheme
Cisco 40 Gbps Full-Band Tunable CP-DQPSK Transponders feature an advanced modulation scheme that aims to
reach performance beyond industry-standard 10-Gbps equivalent units.
Cisco selected a Coherent Polarization Differential Quadrature Phase Shift Keying (CP-DQPSK) modulation format
to optimize 40-Gbps Transmission in terms of optical signal-to-noise ratio (OSNR), chromatic dispersion
robustness, and PMD robustness.
The CP-DQPSK modulation scheme consists of multiplexing two DQPSK signals over two different orthogonal
polarizations, as shown in Figures 3 and 4.
Tx
Rx
EDFA
SFI 5.1 Interface
OC768/S
TM-256
OTU3
VSR
MSA300
SFI 5.1 Interface
40-Gbps
FEC/EFEC
ASIC
CP-DQPSK
MSA
Trunk Module
Trunk
Rx
Client
Tx