Intel 530 LF80537NE0301M Data Sheet

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Datasheet

Unlike traditional thermal devices, the DTS will output a temperature relative to the 

maximum supported operating temperature of the processor (T

J,max

). It is the 

responsibility of software to convert the relative temperature to an absolute 

temperature. The temperature returned by the DTS will always be at or below T

J,max

. 

Catastrophic temperature conditions are detectable via an Out Of Spec status bit. This 

bit is also part of the DTS MSR. When this bit is set, the processor is operating out of 

specification and immediate shutdown of the system should occur. The processor 

operation and code execution is not guaranteed once the activation of the Out of Spec 

status bit is set.

The DTS-relative temperature readout corresponds to the Intel Thermal Monitor 1/Intel 

Thermal Monitor 2 trigger point. When the DTS indicates maximum processor core 

temperature has been reached, the Intel Thermal Monitor 1 or 2 hardware thermal 

control mechanism will activate. The DTS and Intel Thermal Monitor 1/Intel Thermal 

Monitor 2 temperature may not correspond to the thermal diode reading because the 

thermal diode is located in a separate portion of the die and thermal gradient between 

the individual core DTS. Additionally, the thermal gradient from DTS to thermal diode 

can vary substantially due to changes in processor power, mechanical and thermal 

attach, and software application. The system designer is required to use the DTS to 

guarantee proper operation of the processor within its temperature operating 

specifications.

Changes to the temperature can be detected via two programmable thresholds located 

in the processor MSRs. These thresholds have the capability of generating interrupts 

via the core's local APIC. Refer to the Intel® 64 and IA-32 Architectures Software 

Developer’s Manual for specific register and programming details.

Overheat detection is performed by monitoring the processor temperature and 

temperature gradient. This feature is intended for graceful shut down before the 

THERMTRIP# is activated. If the processor’s Intel Thermal Monitor 1 or 2 are triggered 

and the temperature remains high, an “Out Of Spec” status and sticky bit are latched in 

the status MSR register and generates thermal interrupt. 

An external signal, PROCHOT# (processor hot), is asserted when the processor die 

temperature has reached its maximum operating temperature. If Intel Thermal Monitor 

1 or 2 is enabled, then the TCC will be active when PROCHOT# is asserted. The 

processor can be configured to generate an interrupt upon the assertion or deassertion 

of PROCHOT#. Refer to the Intel® 64 and IA-32 Architectures Software Developer’s 

Manual for specific register and programming details.

The processor implements a bi-directional PROCHOT# capability to allow system 

designs to protect various components from overheating situations. The PROCHOT# 

signal is bi-directional in that it can either signal when the processor has reached its 

maximum operating temperature or be driven from an external source to activate the 

TCC. The ability to activate the TCC via PROCHOT# can provide a means for thermal 

protection of system components.

Only a single PROCHOT# pin exists at a package level of the processor. When either 

core's thermal sensor trips, the PROCHOT# signal will be driven by the processor 

package. If only Intel Thermal Monitor 1 is enabled, PROCHOT# will be asserted and 

only the core that is above TCC temperature trip point will have its core clocks 

modulated. If Intel Thermal Monitor 2 is enabled, then regardless of which core(s) are 

above TCC temperature trip point, both cores will enter the lowest programmed Intel 

Thermal Monitor 2 performance state. It is important to note that Intel recommends 

both Intel Thermal Monitor 1 and 2 to be enabled.