Cisco Prisma II bdr Digital Reverse 4 1 Multiplexing System Installation Guide
Appendix A: Quantization Noise and Companding,
Continued
A plot of quantization error versus input voltage for a 4-bit A/D-D/A is shown in
Figure A2. These results may be directly extended to devices with more or fewer
bits.
Figure A2. These results may be directly extended to devices with more or fewer
bits.
-0.25
-0.2
-0.15
-0.1
-0.05
0
0.05
0.1
0.15
0.2
0.25
-0.75
-0.5
-0.25
0
0.25
0.5
0.75
V
I
Figure A2. Quantization Error versus Input Voltage
4000819 Rev B
Improving the Performance and Capacity of Digital Reverse Systems
19