Intel E3-1260L CM8062301061800 User Manual
Product codes
CM8062301061800
Interfaces
22
Datasheet, Volume 1
Note:
DIMM module support is based on availability and is subject to change.
2.1.2
System Memory Timing Support
The IMC supports the following DDR3 Speed Bin, CAS Write Latency (CWL), and
command signal mode timings on the main memory interface:
command signal mode timings on the main memory interface:
t
CL
= CAS Latency
t
RCD
= Activate Command to READ or WRITE Command delay
t
RP
= PRECHARGE Command Period
CWL = CAS Write Latency
Command Signal modes = 1n indicates a new command may be issued every clock
and 2n indicates a new command may be issued every 2 clocks. Command launch
mode programming depends on the transfer rate and memory configuration.
mode programming depends on the transfer rate and memory configuration.
Notes:
1.
1.
System memory timing support is based on availability and is subject to change.
Server and Workstation Platforms:
Unbuffered/ECC Supported DIMM Module Configurations
D
1 GB
1 Gb
128 M X 8
9
1
14/10
8
8 K
2 GB
2 Gb
256 M X 8
9
1
15/10
8
8 K
E
2 GB
1 Gb
128 M X 8
18
2
14/10
8
8 K
4 GB
2 Gb
256 M X 8
18
2
15/10
8
8 K
8 GB
4 Gb
512 M X 8
18
2
16/10
8
8 K
Table 2-1.
Supported UDIMM Module Configurations (Sheet 2 of 2)
Raw
Card
Version
DIMM
Capacity
DRAM Device
Technology
DRAM
Organization
# of
DRAM
Devices
# of
Physical
Device
Ranks
# of
Row/Col
Address
Bits
# of
Banks
Inside
DRAM
Page Size
Table 2-2.
DDR3 System Memory Timing Support
Segment
Transfer
Rate
(MT/s)
tCL
(tCK)
tRCD
(tCK)
tRP
(tCK)
CWL
(tCK)
DPC
CMD
Mode
Notes
1
All Desktop
segments
1066
7
7
7
6
1
1n/2n
2
2n
8
8
8
6
1
1n/2n
2
2n
1333
9
9
9
7
1
1n/2n
2
2n