Asrock 1core1333-2.66g User Manual
2 9
2 9
2 9
2 9
2 9
3.3.2
3.3.2
3.3.2
3.3.2
3.3.2 Chipset Configuration
Chipset Configuration
Chipset Configuration
Chipset Configuration
Chipset Configuration
BIOS SETUP UTILITY
v02.54 (C) Copyright 1985-2005, American Megatrends, Inc.
Chipset Configuration
DRAM Frequency
Flexibility Option
Configure DRAM Timing by SPD
Configure DRAM Timing by SPD
DRAM CAS# Latency
[Disabled]
[Enabled]
[Auto]
[Enabled]
[Auto]
[Auto]
Select Screen
Select Item
Select Item
+ -
Change Option
F1
General Help
F10
Save and Exit
ESC
Exit
F9
Load Defaults
Options
200MHz
(DDRII400)
Auto
266MHz
(DDRII533)
333MHz
(DDRII667)
Advanced
[PCI]
[Auto]
[DVMT Mode]
[Maximum DVMT]
[Auto]
[DVMT Mode]
[Maximum DVMT]
Primary Graphics Adapter
Internal Graphics Mode Select
DVMT Mode Select
Internal Graphics Mode Select
DVMT Mode Select
DVMT/FIXED Memory
[Auto]
[Auto]
[Enabled]
[Enabled]
[Auto]
[Enabled]
[Enabled]
OnBoard HD Audio
Front Panel
CD-In
CD-In
OnBoard Lan
[Enabled]
PCI Fix Function
[Auto]
VCCM Voltage
DRAM Frequency
If [Auto] is selected, the motherboard will detect the memory module(s)
inserted and assigns appropriate frequency automatically. You may also
select other value as operating frequency: [200MHz (DDRII 400)], [266MHz
(DDRII 533)], [333MHz (DDRII 667)]. The configuration options may change
according to the corresponding FSB frequency of the CPU you adopt.
Flexibility Option
The default value of this option is [Disabled]. It will allow better tolerance for
memory compatibility when it is set to [Enabled].
Configure DRAM Timing by SPD
Select [Enabled] will configure the following items by the contents in the
SPD (Serial Presence Detect) device. If you select [Disabled], you will find
the items “DRAM RAS# to CAS# Delay”, “DRAM RAS# Precharge”, and
“DRAM RAS# Activate to Precharge” appear to allow you adjusting them.
DRAM CAS# Latency
Use this item to adjust the means of memory accessing. Configuration
options: [2 DRAM Clocks], [3 DRAM Clocks], [4 DRAM Clocks], [5 DRAM
Clocks], and [6 DRAM Clocks].
DRAM RAS# to CAS# Delay
This controls the latency between the DRAM active command and the
read / write command. Configuration options: [2 DRAM Clocks], [3 DRAM
Clocks], [4 DRAM Clocks], [5 DRAM Clocks], and [6 DRAM Clocks].
Please note that enabling this function may reduce CPU voltage and lead to system
stability or compatibility issue with some power supplies. Please set this item to
[Disable] if above issue occurs.