AMD amd64 architecture User Manual
128-Bit Media and Scientific Programming
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24592—Rev. 3.15—November 2009
AMD64 Technology
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128-Bit Media and Scientific Programming
This chapter describes the 128-bit media and scientific programming model. This model includes all
instructions that access the 128-bit XMM registers—called the 128-bit media instructions. These
instructions perform integer and floating-point operations primarily on vector operands (a few of the
instructions take scalar operands). They can speed up certain types of procedures—typically high-
performance media and scientific procedures—by substantial factors, depending on data-element size
and the regularity and locality of data accesses to memory.
instructions that access the 128-bit XMM registers—called the 128-bit media instructions. These
instructions perform integer and floating-point operations primarily on vector operands (a few of the
instructions take scalar operands). They can speed up certain types of procedures—typically high-
performance media and scientific procedures—by substantial factors, depending on data-element size
and the regularity and locality of data accesses to memory.
4.1
Overview
4.1.1 Origins
The 128-bit media instruction set includes instructions originally introduced as the streaming SIMD
extensions (SSE), and instructions added in subsequent extensions (SSE2, SSE3, and SSE4A). For
details on the instruction set origin of each instruction, see “Instruction Subsets vs. CPUID FeatureSets” in Volume 3.
extensions (SSE), and instructions added in subsequent extensions (SSE2, SSE3, and SSE4A). For
details on the instruction set origin of each instruction, see “Instruction Subsets vs. CPUID FeatureSets” in Volume 3.
4.1.2 Compatibility
The 128-bit media instructions can be executed in any of the architecture’s operating modes. Existing
SSE, SSE2, SSE3, and SSE4A binary programs run in legacy and compatibility modes without
modification. The support provided by the AMD64 architecture for such binaries is identical to that
provided by legacy x86 architectures.
SSE, SSE2, SSE3, and SSE4A binary programs run in legacy and compatibility modes without
modification. The support provided by the AMD64 architecture for such binaries is identical to that
provided by legacy x86 architectures.
To run in 64-bit mode, legacy 128-bit media programs must be recompiled. The recompilation has no
side effects on such programs, other than to provide access to the following additional resources:
side effects on such programs, other than to provide access to the following additional resources:
•
Access to the eight extended XMM registers (for a total of 16 XMM registers).
•
Access to the eight extended general-purpose registers (for a total of 16 GPRs).
•
Access to the extended 64-bit width of all GPRs.
•
Access to the 64-bit virtual address space.
•
Access to the RIP-relative addressing mode.
The 128-bit media instructions use data registers, a control and status register (MXCSR), rounding
control, and an exception reporting and response mechanism that are distinct from and functionally
independent of those used by the x87 floating-point instructions. Because of this, 128-bit media
programming support usually requires exception handlers that are distinct from those used for x87
exceptions. This support is provided by virtually all legacy operating systems for the x86 architecture.
control, and an exception reporting and response mechanism that are distinct from and functionally
independent of those used by the x87 floating-point instructions. Because of this, 128-bit media
programming support usually requires exception handlers that are distinct from those used for x87
exceptions. This support is provided by virtually all legacy operating systems for the x86 architecture.