AMD amd64 architecture User Manual
112
128-Bit Media and Scientific Programming
AMD64 Technology
24592—Rev. 3.15—November 2009
Figure 4-7.
Move Mask Operation
4.2.6 Matrix and Special Arithmetic Operations
The instruction set provides a broad assortment of vector add, subtract, multiply, divide, and square-
root operations for use on matrices and other data structures common to media and scientific
applications. It also provides special arithmetic operations including multiply-add, average, sum-of-
absolute differences, reciprocal square-root, and reciprocal estimation.
root operations for use on matrices and other data structures common to media and scientific
applications. It also provides special arithmetic operations including multiply-add, average, sum-of-
absolute differences, reciprocal square-root, and reciprocal estimation.
Media applications often multiply and accumulate vector and matrix data. In 3D-graphics geometry,
for example, objects are typically represented by triangles, each of whose vertices are located in 3D
space by a matrix of coordinate values, and matrix transforms are performed to simulate object
movement.
for example, objects are typically represented by triangles, each of whose vertices are located in 3D
space by a matrix of coordinate values, and matrix transforms are performed to simulate object
movement.
128-bit media integer and floating-point instructions can perform several types of matrix-vector or
matrix-matrix operations, such as addition, subtraction, multiplication, and accumulation, to effect 3D
tranforms of vertices. Efficient matrix multiplication is further supported with instructions that can
first transpose the elements of matrix rows and columns. These transpositions can make subsequent
accesses to memory or cache more efficient when performing arithmetic matrix operations.
matrix-matrix operations, such as addition, subtraction, multiplication, and accumulation, to effect 3D
tranforms of vertices. Efficient matrix multiplication is further supported with instructions that can
first transpose the elements of matrix rows and columns. These transpositions can make subsequent
accesses to memory or cache more efficient when performing arithmetic matrix operations.
Figure 4-8 on page 113 shows a vector multiply-add instruction (PMADDWD) that multiplies vectors
of 16-bit integer elements to yield intermediate results of 32-bit elements, which are then summed
pair-wise to yield four 32-bit elements. This operation can be used with one source operand (for
example, a coefficient) taken from memory and the other source operand (for example, the data to be
multiplied by that coefficient) taken from an XMM register. It can also be used together with a vector-
add operation to accumulate dot product results (also called inner or scalar products), which are used
of 16-bit integer elements to yield intermediate results of 32-bit elements, which are then summed
pair-wise to yield four 32-bit elements. This operation can be used with one source operand (for
example, a coefficient) taken from memory and the other source operand (for example, the data to be
multiplied by that coefficient) taken from an XMM register. It can also be used together with a vector-
add operation to accumulate dot product results (also called inner or scalar products), which are used
operand 1
. . . . . . . . . . . . . .
. . . . . . . . . . . . . .
127
0
operand 2
127
0
select
select
store address
memory
rDI
513-148.eps