AMD amd64 architecture User Manual
128-Bit Media and Scientific Programming
135
24592—Rev. 3.15—November 2009
AMD64 Technology
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S—Signed, or Saturation, or Shift
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SD—Scalar double-precision floating-point
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SI—Signed integer
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SS—Scalar single-precision floating-point, or Signed saturation
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U—Unsigned, or Unordered, or Unaligned
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US—Unsigned saturation
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W—Word
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x—One or more variable characters in the mnemonic
For example, the mnemonic for the instruction that packs four words into eight unsigned bytes is
PACKUSWB. In this mnemonic, the US designates an unsigned result with saturation, and the WB
designates the source as words and the result as bytes.
PACKUSWB. In this mnemonic, the US designates an unsigned result with saturation, and the WB
designates the source as words and the result as bytes.
4.5.2 Data Transfer
The data-transfer instructions copy operands between a memory location, an XMM register, an MMX
register, or a GPR. The MOV mnemonic, which stands for move, is a misnomer. A copy function is
actually performed instead of a move. A new copy of the source value is created at the destination
address, and the original copy remains unchanged at its source location.
register, or a GPR. The MOV mnemonic, which stands for move, is a misnomer. A copy function is
actually performed instead of a move. A new copy of the source value is created at the destination
address, and the original copy remains unchanged at its source location.
Move.
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MOVD—Move Doubleword or Quadword
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MOVQ—Move Quadword
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MOVDQA—Move Aligned Double Quadword
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MOVDQU—Move Unaligned Double Quadword
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MOVDQ2Q—Move Quadword to Quadword
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MOVQ2DQ—Move Quadword to Quadword
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LDDQU—Load Double Quadword Unaligned
The MOVD instruction copies a 32-bit or 64-bit value from a GPR register or memory location to the
low-order 32 or 64 bits of an XMM register, or from the low-order 32 or 64 bits of an XMM register to
a 32-bit or 64-bit GPR or memory location. If the source operand is a GPR or memory location, the
source is zero-extended to 128 bits in the XMM register. If the source is an XMM register, only the
low-order 32 or 64 bits of the source are copied to the destination.
low-order 32 or 64 bits of an XMM register, or from the low-order 32 or 64 bits of an XMM register to
a 32-bit or 64-bit GPR or memory location. If the source operand is a GPR or memory location, the
source is zero-extended to 128 bits in the XMM register. If the source is an XMM register, only the
low-order 32 or 64 bits of the source are copied to the destination.
The MOVQ instruction copies a 64-bit value from memory to the low quadword of an XMM register,
or from the low quadword of an XMM register to memory, or between the low quadwords of two
XMM registers. If the source is in memory and the destination is an XMM register, the source is zero-
extended to 128 bits in the XMM register.
or from the low quadword of an XMM register to memory, or between the low quadwords of two
XMM registers. If the source is in memory and the destination is an XMM register, the source is zero-
extended to 128 bits in the XMM register.
The MOVDQA instruction copies a 128-bit value from memory to an XMM register, or from an XMM
register to memory, or between two XMM registers. If either the source or destination is a memory
register to memory, or between two XMM registers. If either the source or destination is a memory