AMD amd64 architecture User Manual
156
128-Bit Media and Scientific Programming
AMD64 Technology
24592—Rev. 3.15—November 2009
Or
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POR—Packed Logical Bitwise OR
The POR instruction performs a logical bitwise OR of the values in the first and second operands and
writes the result to the destination.
writes the result to the destination.
Exclusive Or
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PXOR—Packed Logical Bitwise Exclusive OR
The PXOR instruction performs a logical bitwise exclusive OR of the values in the first and second
operands and writes the result to the destination. PXOR can be used to clear all bits in an XMM
register by specifying the same register for both operands.
operands and writes the result to the destination. PXOR can be used to clear all bits in an XMM
register by specifying the same register for both operands.
4.5.9 Save and Restore State
These instructions save and restore the entire processor state for 128-bit media instructions.
Save and Restore 128-Bit, 64-Bit, and x87 State
•
FXSAVE—Save XMM, MMX, and x87 State.
•
FXRSTOR—Restore XMM, MMX, and x87 State.
The FXSAVE and FXRSTOR instructions save and restore the entire 512-byte processor state for 128-
bit media instructions, 64-bit media instructions, and x87 floating-point instructions. The architecture
supports two memory formats for FXSAVE and FXRSTOR, a 512-byte 32-bit legacy format and a
512-byte 64-bit format. Selection of the 32-bit or 64-bit format is determined by the effective operand
size for the FXSAVE and FXRSTOR instructions. For details, see “FXSAVE and FXRSTORInstructions” in Volume 2.
bit media instructions, 64-bit media instructions, and x87 floating-point instructions. The architecture
supports two memory formats for FXSAVE and FXRSTOR, a 512-byte 32-bit legacy format and a
512-byte 64-bit format. Selection of the 32-bit or 64-bit format is determined by the effective operand
size for the FXSAVE and FXRSTOR instructions. For details, see “FXSAVE and FXRSTORInstructions” in Volume 2.
Save and Restore Control and Status
•
STMXCSR—Store MXCSR Control/Status Register
•
LDMXCSR—Load MXCSR Control/Status Register
The STMXCSR and LDMXCSR instructions save and restore the 32-bit contents of the MXCSR
register. For further information, see “MXCSR Register” on page 117.
register. For further information, see “MXCSR Register” on page 117.
4.6
Instruction Summary—Floating-Point Instructions
This section summarizes the functions of the floating-point instructions in the 128-bit media
instruction subset. These include floating-point instructions that use an XMM register for source or
destination and data-conversion instructions that convert from floating-point to integer formats. For a
summary of the integer instructions in the 128-bit media instruction subset, including data-conversion
instructions that convert from integer to floating-point formats, see “Instruction Summary—Integer
Instructions” on page 133.
instruction subset. These include floating-point instructions that use an XMM register for source or
destination and data-conversion instructions that convert from floating-point to integer formats. For a
summary of the integer instructions in the 128-bit media instruction subset, including data-conversion
instructions that convert from integer to floating-point formats, see “Instruction Summary—Integer
Instructions” on page 133.