AMD amd64 architecture User Manual
238
x87 Floating-Point Programming
AMD64 Technology
24592—Rev. 3.15—November 2009
number into double-extended-precision format. The processor can convert numbers back to specific
formats, or leave them in double-extended-precision format when writing them to memory.
formats, or leave them in double-extended-precision format when writing them to memory.
Most x87 operations for addition, subtraction, multiplication, and division specify two source
operands, the first of which is replaced by the result. Instructions for subtraction and division have
reverse forms which swap the ordering of operands.
operands, the first of which is replaced by the result. Instructions for subtraction and division have
reverse forms which swap the ordering of operands.
6.1.2 Origins
In 1979, AMD introduced the first floating-point coprocessor for microprocessors—the AM9511
arithmetic circuit. This coprocessor performed 32-bit floating-point operations under microprocessor
control. In 1980, AMD introduced the AM9512, which performed 64-bit floating-point operations.
These coprocessors were second-sourced as the 8231 and 8232 coprocessors. Before then,
programmers working with general-purpose microprocessors had to use much slower, vendor-supplied
software libraries for their floating-point needs.
arithmetic circuit. This coprocessor performed 32-bit floating-point operations under microprocessor
control. In 1980, AMD introduced the AM9512, which performed 64-bit floating-point operations.
These coprocessors were second-sourced as the 8231 and 8232 coprocessors. Before then,
programmers working with general-purpose microprocessors had to use much slower, vendor-supplied
software libraries for their floating-point needs.
In 1985, the Institute of Electrical and Electronics Engineers published the IEEE Standard for Binary
Floating-Point Arithmetic, also referred to as the ANSI/IEEE Std 754-1985 standard, or IEEE 754.
This standard defines the data types, operations, and exception-handling methods that are the basis for
the x87 floating-point technology implemented in the legacy x86 architecture. In 1987, the IEEE
published a more general radix-independent version of that standard, called the ANSI/IEEE Std 854-
1987 standard, or IEEE 854 for short. The AMD64 architecture complies with both the IEEE 754 and
IEEE 854 standards.
Floating-Point Arithmetic, also referred to as the ANSI/IEEE Std 754-1985 standard, or IEEE 754.
This standard defines the data types, operations, and exception-handling methods that are the basis for
the x87 floating-point technology implemented in the legacy x86 architecture. In 1987, the IEEE
published a more general radix-independent version of that standard, called the ANSI/IEEE Std 854-
1987 standard, or IEEE 854 for short. The AMD64 architecture complies with both the IEEE 754 and
IEEE 854 standards.
6.1.3 Compatibility
x87 floating-point instructions can be executed in any of the architecture’s operating modes. Existing
x87 binary programs run in legacy and compatibility modes without modification. The support
provided by the AMD64 architecture for such binaries is identical to that provided by legacy x86
architectures.
x87 binary programs run in legacy and compatibility modes without modification. The support
provided by the AMD64 architecture for such binaries is identical to that provided by legacy x86
architectures.
To run in 64-bit mode, x87 floating-point programs must be recompiled. The recompilation has no side
effects on such programs, other than to make available the extended general-purpose registers and 64-
bit virtual address space.
effects on such programs, other than to make available the extended general-purpose registers and 64-
bit virtual address space.
6.2
Registers
Operands for the x87 instructions are located in x87 registers or memory. Figure 6-1 on page 239
shows an overview of the x87 registers.
shows an overview of the x87 registers.