AMD amd64 architecture User Manual
266
x87 Floating-Point Programming
AMD64 Technology
24592—Rev. 3.15—November 2009
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FLDLG2—Floating-Point Load Log10 2
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FLDLN2—Floating-Point Load Ln 2
The FLDL2E, FLDL2T, FLDLG2, and FLDLN2 instructions, respectively, push the floating-point
constant value, log
constant value, log
2
e, log
2
10, log
10
2, and log
e
2, onto the top-of-stack, ST(0).
6.4.4 Arithmetic
The arithmetic instructions support addition, subtraction, multiplication, division, change-sign, round,
round to integer, partial remainder, and square root. In most arithmetic operations, one of the source
operands is the top-of-stack, ST(0). The other source operand can be another stack entry, ST(i), or a
floating-point or integer operand in memory.
round to integer, partial remainder, and square root. In most arithmetic operations, one of the source
operands is the top-of-stack, ST(0). The other source operand can be another stack entry, ST(i), or a
floating-point or integer operand in memory.
The non-commutative operations of subtraction and division have two forms, the direct FSUB and
FDIV, and the reverse FSUBR and FDIVR. FSUB, for example, subtracts the right operand from the
left operand, and writes the result to the left operand. FSUBR subtracts the left operand from the right
operand, and writes the result to the left operand. The FADD and FMUL operations have no reverse
counterparts.
FDIV, and the reverse FSUBR and FDIVR. FSUB, for example, subtracts the right operand from the
left operand, and writes the result to the left operand. FSUBR subtracts the left operand from the right
operand, and writes the result to the left operand. The FADD and FMUL operations have no reverse
counterparts.
Addition
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FADD—Floating-Point Add
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FADDP—Floating-Point Add and Pop
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FIADD—Floating-Point Add Integer to Stack Top
The FADD instruction syntax has forms that include one or two explicit source operands. In the one-
operand form, the instruction reads a 32-bit or 64-bit floating-point value from memory, converts it to
the double-extended-precision format, adds it to ST(0), and writes the result to ST(0). In the two-
operand form, the instruction adds both source operands from stack registers and writes the result to
the first operand.
operand form, the instruction reads a 32-bit or 64-bit floating-point value from memory, converts it to
the double-extended-precision format, adds it to ST(0), and writes the result to ST(0). In the two-
operand form, the instruction adds both source operands from stack registers and writes the result to
the first operand.
The FADDP instruction syntax has forms that include zero or two explicit source operands. In the
zero-operand form, the instruction adds ST(0) to ST(1), writes the result to ST(1), and pops the stack.
In the two-operand form, the instruction adds both source operands from stack registers, writes the
result to the first operand, and pops the stack.
zero-operand form, the instruction adds ST(0) to ST(1), writes the result to ST(1), and pops the stack.
In the two-operand form, the instruction adds both source operands from stack registers, writes the
result to the first operand, and pops the stack.
The FIADD instruction reads a 16-bit or 32-bit integer value from memory, converts it to the double-
extended-precision format, adds it to ST(0), and writes the result to ST(0).
extended-precision format, adds it to ST(0), and writes the result to ST(0).
Subtraction
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FSUB—Floating-Point Subtract
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FSUBP—Floating-Point Subtract and Pop
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FISUB—Floating-Point Integer Subtract
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FSUBR—Floating-Point Subtract Reverse
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FSUBRP—Floating-Point Subtract Reverse and Pop