AMD amd64 architecture User Manual
General-Purpose Programming
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24592—Rev. 3.15—November 2009
AMD64 Technology
3.3.4 Load Segment Registers
These instructions load segment registers.
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LDS, LES, LFS, LGS, LSS—Load Far Pointer
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MOV segReg—Move Segment Register
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POP segReg—Pop Stack Into Segment Register
The LDS, LES, LFD, LGS, and LSS instructions atomically (with respect to interrupts only, not
contending memory accesses) load the two parts of a far pointer into a segment register and a general-
purpose register. A far pointer is a 16-bit segment selector and a 16-bit or 32-bit offset. The load copies
the segment-selector portion of the pointer from memory into the segment register and the offset
portion of the pointer from memory into a general-purpose register.
contending memory accesses) load the two parts of a far pointer into a segment register and a general-
purpose register. A far pointer is a 16-bit segment selector and a 16-bit or 32-bit offset. The load copies
the segment-selector portion of the pointer from memory into the segment register and the offset
portion of the pointer from memory into a general-purpose register.
The effective operand size determines the size of the offset loaded by the LDS, LES, LFD, LGS, and
LSS instructions. The instructions load not only the software-visible segment selector into the segment
register, but they also cause the hardware to load the associated segment-descriptor information into
the software-invisible (hidden) portion of that segment register.
LSS instructions. The instructions load not only the software-visible segment selector into the segment
register, but they also cause the hardware to load the associated segment-descriptor information into
the software-invisible (hidden) portion of that segment register.
The MOV segReg and POP segReg instructions load a segment selector from a general-purpose
register or memory (for MOV segReg) or from the top of the stack (for POP segReg) to a segment
register. These instructions not only load the software-visible segment selector into the segment
register but also cause the hardware to load the associated segment-descriptor information into the
software-invisible (hidden) portion of that segment register.
register or memory (for MOV segReg) or from the top of the stack (for POP segReg) to a segment
register. These instructions not only load the software-visible segment selector into the segment
register but also cause the hardware to load the associated segment-descriptor information into the
software-invisible (hidden) portion of that segment register.
In 64-bit mode, the POP DS, POP ES, and POP SS instructions are invalid.
3.3.5 Load Effective Address
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LEA—Load Effective Address
The LEA instruction calculates and loads the effective address (offset within a given segment) of a
source operand and places it in a general-purpose register.
source operand and places it in a general-purpose register.
LEA is related to MOV, which copies data from a memory location to a register, but LEA takes the
address of the source operand, whereas MOV takes the contents of the memory location specified by
the source operand. In the simplest cases, LEA can be replaced with MOV. For example:
address of the source operand, whereas MOV takes the contents of the memory location specified by
the source operand. In the simplest cases, LEA can be replaced with MOV. For example:
lea eax, [ebx]
has the same effect as:
mov eax, ebx
However, LEA allows software to use any valid addressing mode for the source operand. For example:
lea eax, [ebx+edi]
loads the sum of EBX and EDI registers into the EAX register. This could not be accomplished by a
single MOV instruction.
single MOV instruction.