Epson micro computer s1c33l03 User Manual
II CORE BLOCK: CPU AND OPERATING MODE
S1C33L03 FUNCTION PART
EPSON
B-II-2-5
A-1
B-II
CPU
HEX
No.
Vector number
(Hex address)
Exception/interrupt name
Exception/interrupt factor
IDMA
Ch.
Priority
38
56(Base+E0)
Serial interface Ch.0
Receive error
–
High
39
57(Base+E4)
Receive buffer full
23
↑
3A
58(Base+E8)
Transmit buffer empty
24
59
reserved
–
–
3C
60(Base+F0)
Serial interface Ch.1
Receive error
–
3D
61(Base+F4)
Receive buffer full
25
3E
62(Base+F8)
Transmit buffer empty
26
63
reserved
–
–
40
64(Base+100)
A/D converter
A/D converter, end of conversion
27
41
65(Base+104)
Clock timer
Falling edge of 32 Hz, 8 Hz, 2 Hz or 1 Hz signal
1-minuet, 1-hour or specified time count up
–
66–67
reserved
–
–
44
68(Base+110)
Port input interrupt 4
Edge (rising or falling) or level (High or Low)
28
45
69(Base+114)
Port input interrupt 5
Edge (rising or falling) or level (High or Low)
29
46
70(Base+118)
Port input interrupt 6
Edge (rising or falling) or level (High or Low)
30
↓
47
71(Base+11C)
Port input interrupt 7
Edge (rising or falling) or level (High or Low)
31
Low
∗
Base = Set value in the TTBR register (0x48134 to 0x48137); 0xC00000 by default.