Sharp sf-1020 User Manual
Pin
No.
Used
Port
Sig. Name
I/O Active
Note
42 A6
Address signal
43 A5
Address signal
44 A4
Address signal
45 A3
Address signal
46 A2
Address signal
47 A1
Address signal
48 A0
Address signal
49 D0
Data signal
50 D1
Data signal
51 D2
Data signal
52 D3
Data signal
53 D4
Data signal
54 D5
Data signal
55 D6
Data signal
56 D7
Data signal
57 P4-0
DPFC
O
H
Take-up roller clutch signal
58 P4-1
DRRC
O
H
Transport roller clutch signal
59 P4-2
PS
O
—
Not Used
60 /RD
ROM READ pin
61 /WR
Stepping motor data
WRITE pin
WRITE pin
62 /AS
Address strobe pin
(H-lev. fixed)
(H-lev. fixed)
63 /CLK
System clock pin
(H-lev. fixed)
(H-lev. fixed)
64 /WAIT
Wait pin (H-lev. fixed)
(3) Stepping motor (PAM1, PAM2) drive circuit
The write data is latched by the HC374 at the writing timing of exter-
nal address. When the stepping motor output signal (P6-0) becomes
LOW, the excitement signal of the stepping motor is sent to the
transistor array IC of IC2, 3, driving PAM1 and PAM2.
nal address. When the stepping motor output signal (P6-0) becomes
LOW, the excitement signal of the stepping motor is sent to the
transistor array IC of IC2, 3, driving PAM1 and PAM2.
Write address
Data bus
Drive signal
ACT
H’FF80
D0
PAM1 A
H
H’FF80
D1
PAM1/A
H
H’FF80
D2
PAM1 B
H
H’FF80
D3
PAM1/B
H
H’FF80
D4
PAM2 A
H
H’FF80
D5
PAM2/A
H
H’FF80
D6
PAM2 B
H
H’FF80
D7
PAM2/B
H
*
The power source is driven by VB.
A: Stepping motor phase A coil drive circuit
B: Stepping motor phase B coil drive circuit
A: Stepping motor phase A coil drive circuit
B: Stepping motor phase B coil drive circuit
B: Stepping motor phase B coil drive circuit
A: Stepping motor phase A coil drive circuit
B: Stepping motor phase B coil drive circuit
(4) ADU motor (DDM) drive circuit
The CPU supplies signals of two systems, which are process by the
hardware to drive DDM.
Drive and non-drive speed control is performed with DDM_PWM, and
normal/reverse rotation of the motor is performed with DDM_DIR.
When paper enters the ADU, DDM is driven with DDM_DIR at LOW,
Q3 ON, and Q1 OFF.
When paper enters the ADU, DDM is driven with DDM_DIR at LOW,
Q3 is turned ON and Q1 is turned OFF.
When DDM_PWM is HIGH, Q2 is turned OFF and Q4 is turned ON
by Q3.
In IC8, therefore, A-OFF, B-ON, D-OFF. The motor current flows
through VH
hardware to drive DDM.
Drive and non-drive speed control is performed with DDM_PWM, and
normal/reverse rotation of the motor is performed with DDM_DIR.
When paper enters the ADU, DDM is driven with DDM_DIR at LOW,
Q3 ON, and Q1 OFF.
When paper enters the ADU, DDM is driven with DDM_DIR at LOW,
Q3 is turned ON and Q1 is turned OFF.
When DDM_PWM is HIGH, Q2 is turned OFF and Q4 is turned ON
by Q3.
In IC8, therefore, A-OFF, B-ON, D-OFF. The motor current flows
through VH
→
B
→
M
→
C
→
GND to drive the motor.
The motor rotation is controlled with the PWM control.
When paper is discharged from the ADU, DDM_DIR is HIGH, Q3 is
turned OFF and Q1 is turned ON.
When DDM_PWM is HIGH, Q4 is turned OFF and Q2 is turned ON
by Q1.
In IC8, therefore, A-ON, B-OFF, C-OFF, D-ON. The motor current
flows through VH
When paper is discharged from the ADU, DDM_DIR is HIGH, Q3 is
turned OFF and Q1 is turned ON.
When DDM_PWM is HIGH, Q4 is turned OFF and Q2 is turned ON
by Q1.
In IC8, therefore, A-ON, B-OFF, C-OFF, D-ON. The motor current
flows through VH
→
A
→
M
→
GND to drive the motor.
The motor rotation is controlled with the PWM control.
When the motor is not driven, DDM_PWM and DDM_DIR are LOW.
When the motor is not driven, DDM_PWM and DDM_DIR are LOW.
A
A
B
B
Stepping motor time chart
B
B
+24V
Phase B Phase B
A
A
+24V
Phase A
Phase A
12 – 20