Epson S1F70000 User Manual
S1F77200Y Series
5–2
EPSON
S1F70000 Series
Technical Manual
LINEUP
Table 5-1
Product
Voltage detectable
Output type
Output phase
Min.
Typ.
Max.
Less than V
DET
V
DET
or above
S1F77210Y1C0
2.10
2.15
2.20
CMOS
Low level
High level
S1F77210Y1P0
2.20
2.25
2.30
CMOS
Low level
High level
S1F77210Y1S0
2.30
2.35
2.40
CMOS
Low level
High level
S1F77210Y1E0
2.50
2.55
2.60
CMOS
Low level
High level
S1F77210Y1F0
2.60
2.65
2.70
CMOS
Low level
High level
S1F77210Y1R0
2.73
2.80
2.87
CMOS
Low level
High level
S1F77210Y1G0
2.93
3.00
3.07
CMOS
Low level
High level
S1F77210Y1H0
3.13
3.20
3.27
CMOS
Low level
High level
S1F77210Y130
3.43
3.50
3.57
CMOS
Low level
High level
S1F77210Y1T0
3.90
4.00
4.10
CMOS
Low level
High level
S1F77210Y1M0
4.10
4.20
4.30
CMOS
Low level
High level
S1F77210Y1J0
4.30
4.40
4.50
CMOS
Low level
High level
S1F77210Y120
4.50
4.60
4.70
CMOS
Low level
High level
S1F77210Y1K0
4.70
4.80
4.90
CMOS
Low level
High level
S1F77210Y1L0
4.90
5.00
5.10
CMOS
Low level
High level
S1F77210Y2C0
2.10
2.15
2.20
CMOS
High level
Low level
S1F77210Y2F0
2.60
2.65
2.70
CMOS
High level
Low level
Product
Voltage detectable
Output type
Output phase
Min.
Typ.
Max.
Less than V
DET
V
DET
or above
S1F77200Y1T0
3.90
4.00
4.10
N ch Open Drain
Low level
Hi–Z
S1F77200Y1F0
2.60
2.65
2.70
N ch Open Drain
Low level
Hi–Z
S1F77200Y1C0
2.10
2.15
2.20
N ch Open Drain
Low level
Hi–Z
S1F77200Y1N0
1.85
1.90
1.95
N ch Open Drain
Low level
Hi–Z
S1F77200Y1B0
1.10
1.15
1.20
N ch Open Drain
Low level
Hi–Z
S1F77200Y1Y0
1.05
1.10
1.15
N ch Open Drain
Low level
Hi–Z
S1F77200Y1A0
1.00
1.05
1.10
N ch Open Drain
Low level
Hi–Z
S1F77200Y1V0
0.90
0.95
1.00
N ch Open Drain
Low level
Hi–Z
S1F77220Y2D0
1.20
1.25
1.30
P ch Open Drain
High level
Hi–Z
Table 5-2