SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Revision 1.4 (08-19-08)

154

SMSC LAN9311/LAN9311i

 

8-bits number_of_bursts

repeat (number_of_bursts)

16-bits {starting_address[9:2] / count[7:0]}

repeat (count)

8-bits data[31:24], 8-bits data[23:16], 8-bits data[15:8], 8-bits data[7:0]

The starting address is a DWORD address. Appending two 0 bits will form the register address.

As an example, the following is a 3 burst sequence, with 1, 2, and 3 DWORDs starting at register
addresses 40h, 80h, and C0h respectively:

 (Burst Sequence Valid Flag)

 (number_of_bursts)

 (starting_address1 divided by 4 / count1)

 (4 x count1 of data)

 (starting_address2 divided by 4 / count2)

(4 x count2 of data)

 (starting_address3 divided by 4 / count3)

(4 x count3 of data)

In order to avoid overwriting the Switch CSR register interface or the PHY Management Interface
(PMI), the EEPROM Loader waits until the CSR Busy bit of the 

 and the MII Busy bit of the 

 are cleared before performing any register write.

The EEPROM Loader checks that the EEPROM address space is not exceeded. If so, it will stop and
set the EEPROM Loader Address Overflow bit in the 

. The

address limit is based on the eeprom_size_strap which specifies a range of sizes. The address limit
is set to the largest value of the specified range.

Once finished with the last burst, the EEPROM Loader will go into a wait-state and the EPC_BUSY
bit of the 

 will be cleared.

In order to allow the EEPROM Loader to change the Port 1/2 PHYs and Virtual PHY strap inputs and
maintain consistency with the PHY and Virtual PHY registers, the following sequence is used:

1. After power-up or upon a hardware reset (nRST), the straps are sampled into the

LAN9311/LAN9311i as specified in 

.

2. After the PLL is stable, the main chip reset is released and the EEPROM Loader reads the

EEPROM and configures (overrides) the strap inputs.

3. The EEPROM Loader writes select Port 1/2 and Virtual PHY registers, as specified in

 and 

, respectively.

Step 3 is also performed in the case of a RELOAD command or digital reset.