SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Revision 1.4 (08-19-08)

216

SMSC LAN9311/LAN9311i

 

This read/write register is responsible for adjusting the 64-bit 1588 Clock frequency. Refer to

 for details on how to properly use

this register.

Offset:

178h

Size:

32 bits

31:0

Clock Addend (CLOCK_ADDEND)
This 32-bit value is added to the 1588 frequency divisor accumulator every 
cycle. This allows the base 100MHz frequency of the 64-bit 1588 Clock to 
be adjusted accordingly.

R/W

00000000h