SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Revision 1.4 (08-19-08)

220

SMSC LAN9311/LAN9311i

 

This read/write register combined with 

 form the 64-bit 1588 Clock Target Reload value. The 1588

Clock Target Reload is the value that is reloaded or added to the 1588 Clock Compare value when a
clock compare event occurs. Whether this value is reloaded or added is determined by the 

 bit of the 

. Refer to 

 for additional information.

Both this register and the 

 must be written for either to be affected.

Offset:

188h

Size:

32 bits

31:0

Clock Target Reload Low (CLOCK_TARGET_RELOAD_LO)
This field contains the low 32-bits of the 64-bit 1588 Clock Target Reload 
value that is reloaded to the 1588 Clock Compare value. Alternatively, these 
32-bits are added to the 1588 Clock Compare value when configured 
accordingly.

R/W

00000000h