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Epson RTC-72421 A User Manual

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RTC - 72421 / 72423 
 
 
Page - 3 
MQ - 162 - 03 
 
 
„ Terminal functions 
 
Pin No. 
Signal 
RTC-72421 RTC-72423 
Input/ou
tput 
Function 
D
0
-D
3
 
(Data bus) 
11
−
14 14
−
16, 19 
Bi-
direction 
Connect these pines to a bi-directional data bus or CPU data bus. Use this bus 
to read to and write from the internal counter and registers.   
CS
1
CS
0
RD
WR
Mode of D
0 to 
D
3
H
L
L
H
Output mode (read mode)
H
L
H
L
Input mode (write mode)
H
L
L
L
Do not use
L
H or L
High impedance (back-up mode)
H
H        H or L
High impedance (RTC not selected)
 
A
0
-A
3
 
(Address bus) 
4
−
7 
5, 7, 9, 10 
Input 
Address input pins used for connection to CPU address, etc. Used to select the 
RTC’s internal counter and registers (address selection).   
When the RTC is connected to a multiplexed-bus type of CPU, these pines can 
also be used in combination with the ALE described below 
ALE 
(Address Latch Enable) 
3 4 
Input 
Reads in address data and 
CS
0
 
state for internal latching. 
When the ALE is high, the address data and 
CS
0
  state is read into the RTC. 
When the (through-mode) ALE falls, the address data and   
CS
0
  state at that 
point are held. The held address data and 
CS
0
  status are maintained while 
the ALE is low. 
ALE
Address data and CS
0
 status
H
L
Read into the RTC to set address data
Held in the RTC (latched at the trailing edge of the ALE)
 
If the RTC is connected to a CPU that does not have an ALE pin and thus there   
is no need to use this ALE pin, fix it to V
DD
. 
WR
 
(WRite) 
10 13 
Input 
Writes the data on D
0
 to D
3
 into the register of the address specified by A
0 to 
A
3, 
at the leading edge of 
WR .
 
Make sure that 
RD
 and 
WR
  are never low at the same time. 
RD
 
(ReaD) 
8 11 
Input 
Output data to D
0
 to D
3
 from the register at the address specified by A
0 to 
A
3, 
while 
RD
 is  low. 
Make sure that 
RD
 and 
WR
  are never low at the same time. 
CS
1
,
CS
0
 
(Chip Select) 
15,2 20,2 
Input 
When CS
1
 is high and 
CS
0
  is low, the RTC’s chip-select function is valid and 
read and write are enabled. 
When the RTC is connected to a multiplexed-bus type of CPU, 
CS
0
 requires 
the operation of the ALE (see the description of the ALE). 
Use CS
1
 connected to a power voltage detection circuit. When CS
1
 is high, the 
RTC is enabled; when it is low, the RTC is on standby. 
When CS
1
 goes low, the HOLD and RESET bits in the RTC registers are 
cleared to 0. 
STD.P 
(STanDard Pulse) 
1 1 
Output 
This is an N-channel open drain output pin. 
Depending on the setting of the C
E
 register, a fixed-period interrupt signal and a 
pulse signal are output. 
The output from this pin cannot be inhibited by the CS
1
 and 
CS
0
 signals. 
Use a load voltage that is less than or equal to V
DD
. If not using this pin, keep it 
open-circuit. 
An example of STD.P connection is shown below.   
At least 2.2 k
Ω
STD.P
RTC
+5 V or V
DD
 
If the STD.P output is not be used during standby operation, connecting the pull-
up resister to +5 V provides a reduction in current consumption. If the STD.P 
output is to be used even during standby, connect the pull-up resistor to the 
RTC’s V
DD
. In this case, the current consumption will be increased by the 
amount of current flowing through the pull-up resistor. 
V
DD
 18 
24 
 
Connect this pin to power source. Supply to 5 V 
±
 10 % to this pin during normal 
operation; at least 2 V during battery back-up operation. 
GND 9 
12 
 
Connect this pin to ground. 
(V
DD
) 16, 
17 
22,23 
 
These pins are connected internally to V
DD
. Leave them open circuit. 
N.C. 
−
 
3, 6, 8, 
17, 18, 21 
 
These pins are not connected internally. Ground them.