Intel Pentium 4 672 HH80547PG1122MH User Manual
Product codes
HH80547PG1122MH
Intel
®
Pentium
®
4 Processor in the 423-pin Package
75
7.0
Features
7.1
Power-On Configuration Options
Several configuration options can be configured by hardware. The Intel
®
Pentium
®
4 Processor in
the 423-pin Package sample its hardware configuration at reset, on the active-to-inactive transition
of RESET#. For specifications on these options, please refer to Table 34.
of RESET#. For specifications on these options, please refer to Table 34.
The sampled information configures the processor for subsequent operation. These configuration
options cannot be changed except during another reset. All resets reconfigure the processor; for
reset purposes, the processor does not distinguish between a “warm” reset and a “power-on” reset.
options cannot be changed except during another reset. All resets reconfigure the processor; for
reset purposes, the processor does not distinguish between a “warm” reset and a “power-on” reset.
NOTE:
1. Asserting this signal during RESET# will select the corresponding option.
7.2
Clock Control and Low Power States
The use of AutoHALT, Stop-Grant, Sleep, and Deep Sleep states is allowed in Pentium 4 processor
based systems to reduce power consumption by stopping the clock to internal sections of the
processor, depending on each particular state. See Figure 27 for a visual representation of the
processor low power states.
based systems to reduce power consumption by stopping the clock to internal sections of the
processor, depending on each particular state. See Figure 27 for a visual representation of the
processor low power states.
7.2.1
Normal State—State 1
This is the normal operating state for the processor.
7.2.2
AutoHALT Powerdown State—State 2
AutoHALT is a low power state entered when the processor executes the HALT instruction. The
processor will transition to the Normal state upon the occurrence of SMI#, BINIT#, INIT#, or
LINT[1:0] (NMI, INTR). RESET# will cause the processor to immediately initialize itself.
processor will transition to the Normal state upon the occurrence of SMI#, BINIT#, INIT#, or
LINT[1:0] (NMI, INTR). RESET# will cause the processor to immediately initialize itself.
The return from a System Management Interrupt (SMI) handler can be to either Normal Mode or
the AutoHALT Power Down state. See the Intel Architecture Software Developer's Manual,
Volume III: System Programmer's Guide for more information.
the AutoHALT Power Down state. See the Intel Architecture Software Developer's Manual,
Volume III: System Programmer's Guide for more information.
Table 34. Power-On Configuration Option Pins
Configuration Option
Pin
1
Output tristate
SMI#
Execute BIST
INIT#
In Order Queue pipelining (set IOQ depth to 1)
A7#
Disable MCERR# observation
A9#
Disable BINIT# observation
A10#
APIC Cluster ID (0-3)
A[12:11]#
Disable bus parking
A15#
Symmetric agent arbitration ID
BR0#